Loading Documentation/devicetree/bindings/crypto/msm/qcedev.txt +2 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ Required properties: - qcom,msm_bus,active-only: Boolean flag for context of request (actve/dual) - qcom,msm_bus,num_paths: The paths for source and destination ports - qcom,msm_bus,vectors: Vectors for bus topology. - qcom,ce-device: Device number. Optional properties: - qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE. Loading @@ -27,6 +28,7 @@ Example: interrupts = <0 235 0>; qcom,bam-pipe-pair = <0>; qcom,ce-hw-instance = <1>; qcom,ce-device = <0>; qcom,ce-hw-shared; qcom,msm-bus,name = "qcedev-noc"; qcom,msm-bus,num-cases = <2>; Loading Documentation/devicetree/bindings/crypto/msm/qcrypto.txt +2 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ Required properties: - qcom,msm_bus,active-only: Boolean flag for context of request (actve/dual) - qcom,msm_bus,num_paths: The paths for source and destination ports - qcom,msm_bus,vectors: Vectors for bus topology. - qcom,ce-device: Device number. Optional properties: - qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE. Loading @@ -34,6 +35,7 @@ Example: interrupts = <0 235 0>; qcom,bam-pipe-pair = <1>; qcom,ce-hw-instance = <1>; qcom,ce-device = <0>; qcom,ce-hw-shared; qcom,msm-bus,name = "qcrypto-noc"; qcom,msm-bus,num-cases = <2>; Loading arch/arm/mach-msm/include/mach/qcrypto.h +6 −1 Original line number Diff line number Diff line /* Copyright (c) 2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -24,6 +24,11 @@ #define QCRYPTO_CTX_XTS_DU_SIZE_512B 0x00000100 #define QCRYPTO_CTX_XTS_DU_SIZE_1KB 0x00000200 int qcrypto_cipher_set_device(struct ablkcipher_request *req, unsigned int dev); int qcrypto_ahash_set_device(struct ahash_request *req, unsigned int dev); int qcrypto_aead_set_device(struct aead_request *req, unsigned int dev); int qcrypto_cipher_set_flag(struct ablkcipher_request *req, unsigned int flags); int qcrypto_ahash_set_flag(struct ahash_request *req, unsigned int flags); int qcrypto_aead_set_flag(struct aead_request *req, unsigned int flags); Loading drivers/crypto/msm/qce.h +1 −0 Original line number Diff line number Diff line Loading @@ -123,6 +123,7 @@ struct ce_hw_support { bool use_sw_hmac_algo; bool use_sw_aes_ccm_algo; bool clk_mgmt_sus_res; unsigned int ce_device; }; /* Sha operation parameters */ Loading drivers/crypto/msm/qce50.c +12 −0 Original line number Diff line number Diff line Loading @@ -223,12 +223,14 @@ static int _probe_ce_engine(struct qce_device *pce_dev) pce_dev->ce_sps.ce_burst_size = MAX_CE_BAM_BURST_SIZE; dev_info(pce_dev->pdev, "CE device = 0x%x\n, " "IO base, CE = 0x%x\n, " "Consumer (IN) PIPE %d, " "Producer (OUT) PIPE %d\n" "IO base BAM = 0x%x\n" "BAM IRQ %d\n" "Engines Availability = 0x%x\n", (uint32_t) pce_dev->ce_sps.ce_device, (uint32_t) pce_dev->iobase, pce_dev->ce_sps.dest_pipe_index, pce_dev->ce_sps.src_pipe_index, Loading Loading @@ -5098,6 +5100,15 @@ static int __qce_get_device_tree_data(struct platform_device *pdev, } else { pr_warn("bam_pipe_pair=0x%x", pce_dev->ce_sps.pipe_pair_index); } if (of_property_read_u32((&pdev->dev)->of_node, "qcom,ce-device", &pce_dev->ce_sps.ce_device)) { pr_err("Fail to get CE device information.\n"); return -EINVAL; } else { pr_warn("ce-device =0x%x", pce_dev->ce_sps.ce_device); } pce_dev->ce_sps.dest_pipe_index = 2 * pce_dev->ce_sps.pipe_pair_index; pce_dev->ce_sps.src_pipe_index = pce_dev->ce_sps.dest_pipe_index + 1; Loading Loading @@ -5435,6 +5446,7 @@ int qce_hw_support(void *handle, struct ce_hw_support *ce_support) pce_dev->use_sw_hmac_algo; ce_support->use_sw_aes_ccm_algo = pce_dev->use_sw_aes_ccm_algo; ce_support->ce_device = pce_dev->ce_sps.ce_device; return 0; } EXPORT_SYMBOL(qce_hw_support); Loading Loading
Documentation/devicetree/bindings/crypto/msm/qcedev.txt +2 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ Required properties: - qcom,msm_bus,active-only: Boolean flag for context of request (actve/dual) - qcom,msm_bus,num_paths: The paths for source and destination ports - qcom,msm_bus,vectors: Vectors for bus topology. - qcom,ce-device: Device number. Optional properties: - qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE. Loading @@ -27,6 +28,7 @@ Example: interrupts = <0 235 0>; qcom,bam-pipe-pair = <0>; qcom,ce-hw-instance = <1>; qcom,ce-device = <0>; qcom,ce-hw-shared; qcom,msm-bus,name = "qcedev-noc"; qcom,msm-bus,num-cases = <2>; Loading
Documentation/devicetree/bindings/crypto/msm/qcrypto.txt +2 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ Required properties: - qcom,msm_bus,active-only: Boolean flag for context of request (actve/dual) - qcom,msm_bus,num_paths: The paths for source and destination ports - qcom,msm_bus,vectors: Vectors for bus topology. - qcom,ce-device: Device number. Optional properties: - qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE. Loading @@ -34,6 +35,7 @@ Example: interrupts = <0 235 0>; qcom,bam-pipe-pair = <1>; qcom,ce-hw-instance = <1>; qcom,ce-device = <0>; qcom,ce-hw-shared; qcom,msm-bus,name = "qcrypto-noc"; qcom,msm-bus,num-cases = <2>; Loading
arch/arm/mach-msm/include/mach/qcrypto.h +6 −1 Original line number Diff line number Diff line /* Copyright (c) 2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -24,6 +24,11 @@ #define QCRYPTO_CTX_XTS_DU_SIZE_512B 0x00000100 #define QCRYPTO_CTX_XTS_DU_SIZE_1KB 0x00000200 int qcrypto_cipher_set_device(struct ablkcipher_request *req, unsigned int dev); int qcrypto_ahash_set_device(struct ahash_request *req, unsigned int dev); int qcrypto_aead_set_device(struct aead_request *req, unsigned int dev); int qcrypto_cipher_set_flag(struct ablkcipher_request *req, unsigned int flags); int qcrypto_ahash_set_flag(struct ahash_request *req, unsigned int flags); int qcrypto_aead_set_flag(struct aead_request *req, unsigned int flags); Loading
drivers/crypto/msm/qce.h +1 −0 Original line number Diff line number Diff line Loading @@ -123,6 +123,7 @@ struct ce_hw_support { bool use_sw_hmac_algo; bool use_sw_aes_ccm_algo; bool clk_mgmt_sus_res; unsigned int ce_device; }; /* Sha operation parameters */ Loading
drivers/crypto/msm/qce50.c +12 −0 Original line number Diff line number Diff line Loading @@ -223,12 +223,14 @@ static int _probe_ce_engine(struct qce_device *pce_dev) pce_dev->ce_sps.ce_burst_size = MAX_CE_BAM_BURST_SIZE; dev_info(pce_dev->pdev, "CE device = 0x%x\n, " "IO base, CE = 0x%x\n, " "Consumer (IN) PIPE %d, " "Producer (OUT) PIPE %d\n" "IO base BAM = 0x%x\n" "BAM IRQ %d\n" "Engines Availability = 0x%x\n", (uint32_t) pce_dev->ce_sps.ce_device, (uint32_t) pce_dev->iobase, pce_dev->ce_sps.dest_pipe_index, pce_dev->ce_sps.src_pipe_index, Loading Loading @@ -5098,6 +5100,15 @@ static int __qce_get_device_tree_data(struct platform_device *pdev, } else { pr_warn("bam_pipe_pair=0x%x", pce_dev->ce_sps.pipe_pair_index); } if (of_property_read_u32((&pdev->dev)->of_node, "qcom,ce-device", &pce_dev->ce_sps.ce_device)) { pr_err("Fail to get CE device information.\n"); return -EINVAL; } else { pr_warn("ce-device =0x%x", pce_dev->ce_sps.ce_device); } pce_dev->ce_sps.dest_pipe_index = 2 * pce_dev->ce_sps.pipe_pair_index; pce_dev->ce_sps.src_pipe_index = pce_dev->ce_sps.dest_pipe_index + 1; Loading Loading @@ -5435,6 +5446,7 @@ int qce_hw_support(void *handle, struct ce_hw_support *ce_support) pce_dev->use_sw_hmac_algo; ce_support->use_sw_aes_ccm_algo = pce_dev->use_sw_aes_ccm_algo; ce_support->ce_device = pce_dev->ce_sps.ce_device; return 0; } EXPORT_SYMBOL(qce_hw_support); Loading