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Commit 2480b34e authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "qcom: pil-msa: Vote for the GPLL0 to MSS connection"

parents 683b63ae 574b0ac3

arch/arm/boot/dts/qcom/msm8994.dtsi

+6 −3
Original line number Diff line number Diff line
@@ -1199,10 +1199,13 @@ 
		clocks = <&clock_rpm clk_cxo_clk_src>,

			 <&clock_gcc clk_gcc_mss_cfg_ahb_clk>,

			 <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>,

			 <&clock_gcc clk_gcc_boot_rom_ahb_clk>;

		clock-names = "xo", "iface_clk", "bus_clk", "mem_clk";

			 <&clock_gcc clk_gcc_boot_rom_ahb_clk>,

			 <&clock_gcc clk_gpll0_out_msscc>;

		clock-names = "xo", "iface_clk", "bus_clk", "mem_clk",

			      "gpll0_mss_clk";

		proxy-clock-names = "xo";

		active-clock-names = "iface_clk", "bus_clk", "mem_clk";

		active-clock-names = "iface_clk", "bus_clk", "mem_clk",

				     "gpll0_mss_clk";



		interrupts = <0 24 1>;

		vdd_mss-supply = <&pm8994_s7>;

drivers/soc/qcom/pil-msa.c

+6 −0
Original line number Diff line number Diff line
@@ -140,9 +140,14 @@ static int pil_mss_enable_clks(struct q6v5_data *drv) 
	ret = clk_prepare_enable(drv->rom_clk);

	if (ret)

		goto err_rom_clk;

	ret = clk_prepare_enable(drv->gpll0_mss_clk);

	if (ret)

		goto err_gpll0_mss_clk;



	return 0;



err_gpll0_mss_clk:

	clk_disable_unprepare(drv->rom_clk);

err_rom_clk:

	clk_disable_unprepare(drv->axi_clk);

err_axi_clk:
@@ -153,6 +158,7 @@ err_ahb_clk: 


static void pil_mss_disable_clks(struct q6v5_data *drv)

{

	clk_disable_unprepare(drv->gpll0_mss_clk);

	clk_disable_unprepare(drv->rom_clk);

	clk_disable_unprepare(drv->axi_clk);

	clk_disable_unprepare(drv->ahb_clk);

drivers/soc/qcom/pil-q6v5-mss.c

+5 −0
Original line number Diff line number Diff line
@@ -310,6 +310,11 @@ static int pil_mss_loadable_init(struct modem_data *drv, 
	if (IS_ERR(q6->rom_clk))

		return PTR_ERR(q6->rom_clk);



	/* Optional. */

	if (of_property_match_string(pdev->dev.of_node, "active-clock-names",

		"gpll0_mss_clk") >= 0)

		q6->gpll0_mss_clk = devm_clk_get(&pdev->dev, "gpll0_mss_clk");



	ret = pil_desc_init(q6_desc);



	return ret;

drivers/soc/qcom/pil-q6v5.h

+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ struct q6v5_data { 
	struct clk *axi_clk;	   /* CPU access to memory */

	struct clk *core_clk;	   /* CPU core */

	struct clk *reg_clk;	   /* CPU access registers */

	struct clk *gpll0_mss_clk; /* GPLL0 to MSS connection */

	struct clk *rom_clk;	   /* Boot ROM */

	void __iomem *axi_halt_base; /* Halt base of q6, mss,

					nc are in same 4K page */