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Commit 246c5ae7 authored by Sachin Shah's avatar Sachin Shah
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arm/dt: msm8974: Add GDSC regulator controlling Venus core



GDSC control is now moved out of PIL to enable power collapse
of Venus core through video driver.

Change-Id: Id8cf5547871434dede63c5a304311c53a9bc78dc
Signed-off-by: default avatarSachin Shah <sachins@codeaurora.org>
parent 86155e46
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+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ Required properties:
Optional properties:
- reg : offset and length of the register set for the device.
- interrupts : should contain the vidc interrupt.
- vdd-supply : regulator to supply venus.
- qcom,vidc-cp-map : start and size of device virtual address range for
  secure buffers. Video hardware uses this address range to identify if
  the buffers are secure or non-secure.
@@ -66,6 +67,7 @@ Example:
		compatible = "qcom,msm-vidc";
		reg = <0xfdc00000 0xff000>;
		interrupts = <0 44 0>;
		vdd-supply = <&gdsc_venus>;
		qcom,vidc-cp-map = <0x1000000 0x40000000>;
		qcom,vidc-ns-map = <0x40000000 0x40000000>;
		qcom,load-freq-tbl = <979200 410000000>,
+1 −0
Original line number Diff line number Diff line
@@ -214,6 +214,7 @@
		compatible = "qcom,msm-vidc";
		reg = <0xfdc00000 0xff000>;
		interrupts = <0 44 0>;
		vdd-supply = <&gdsc_venus>;
		qcom,hfi = "venus";
		qcom,has-ocmem;
		qcom,max-hw-load = <1224450>; /* 4k @ 30 + 1080p @ 30*/