Loading Documentation/devicetree/bindings/fb/mdss-dsi-ctrl.txt +2 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,7 @@ Optional properties: - pinctrl-<0..n>: Lists phandles each pointing to the pin configuration node within a pin controller. These pin configurations are installed in the pinctrl device node. Refer to pinctrl-bindings.txt - qcom,regulator-ldo-mode: Boolean to enable ldo mode for the dsi phy regulator Example: mdss_dsi0: qcom,mdss_dsi@fd922800 { Loading @@ -74,6 +74,7 @@ Example: qcom,dsi-pref-prim-pan = <&dsi_tosh_720_vid>; qcom,platform-strength-ctrl = [ff 06]; qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; qcom,regulator-ldo-mode; qcom,platform-regulator-settings = [07 09 03 00 20 00 01]; qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 Loading drivers/video/msm/mdss/mdss_dsi.c +3 −0 Original line number Diff line number Diff line Loading @@ -1416,6 +1416,9 @@ int dsi_panel_device_register(struct device_node *pan_node, pinfo->mipi.dsi_phy_db.strength[0] = data[0]; pinfo->mipi.dsi_phy_db.strength[1] = data[1]; pinfo->mipi.dsi_phy_db.reg_ldo_mode = of_property_read_bool( ctrl_pdev->dev.of_node, "qcom,regulator-ldo-mode"); data = of_get_property(ctrl_pdev->dev.of_node, "qcom,platform-regulator-settings", &len); if ((!data) || (len != 7)) { Loading drivers/video/msm/mdss/mdss_panel.h +1 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,7 @@ struct mdss_dsi_phy_ctrl { char bistctrl[6]; uint32_t pll[21]; char lanecfg[45]; bool reg_ldo_mode; }; struct mipi_panel_info { Loading drivers/video/msm/mdss/msm_mdss_io_8974.c +3 −3 Original line number Diff line number Diff line Loading @@ -773,9 +773,9 @@ void mdss_dsi_phy_init(struct mdss_panel_data *pdata) /* Regulator ctrl 4 */ MIPI_OUTP((temp_ctrl->phy_io.base) + 0x290, pd->regulator[4]); /* LDO ctrl 0 */ if ((ctrl_pdata->panel_data).panel_info.pdest == DISPLAY_1) MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x1dc, 0x00); /* LDO ctrl */ if (pd->reg_ldo_mode) MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x1dc, 0x25); else MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x1dc, 0x00); Loading Loading
Documentation/devicetree/bindings/fb/mdss-dsi-ctrl.txt +2 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,7 @@ Optional properties: - pinctrl-<0..n>: Lists phandles each pointing to the pin configuration node within a pin controller. These pin configurations are installed in the pinctrl device node. Refer to pinctrl-bindings.txt - qcom,regulator-ldo-mode: Boolean to enable ldo mode for the dsi phy regulator Example: mdss_dsi0: qcom,mdss_dsi@fd922800 { Loading @@ -74,6 +74,7 @@ Example: qcom,dsi-pref-prim-pan = <&dsi_tosh_720_vid>; qcom,platform-strength-ctrl = [ff 06]; qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; qcom,regulator-ldo-mode; qcom,platform-regulator-settings = [07 09 03 00 20 00 01]; qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 Loading
drivers/video/msm/mdss/mdss_dsi.c +3 −0 Original line number Diff line number Diff line Loading @@ -1416,6 +1416,9 @@ int dsi_panel_device_register(struct device_node *pan_node, pinfo->mipi.dsi_phy_db.strength[0] = data[0]; pinfo->mipi.dsi_phy_db.strength[1] = data[1]; pinfo->mipi.dsi_phy_db.reg_ldo_mode = of_property_read_bool( ctrl_pdev->dev.of_node, "qcom,regulator-ldo-mode"); data = of_get_property(ctrl_pdev->dev.of_node, "qcom,platform-regulator-settings", &len); if ((!data) || (len != 7)) { Loading
drivers/video/msm/mdss/mdss_panel.h +1 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,7 @@ struct mdss_dsi_phy_ctrl { char bistctrl[6]; uint32_t pll[21]; char lanecfg[45]; bool reg_ldo_mode; }; struct mipi_panel_info { Loading
drivers/video/msm/mdss/msm_mdss_io_8974.c +3 −3 Original line number Diff line number Diff line Loading @@ -773,9 +773,9 @@ void mdss_dsi_phy_init(struct mdss_panel_data *pdata) /* Regulator ctrl 4 */ MIPI_OUTP((temp_ctrl->phy_io.base) + 0x290, pd->regulator[4]); /* LDO ctrl 0 */ if ((ctrl_pdata->panel_data).panel_info.pdest == DISPLAY_1) MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x1dc, 0x00); /* LDO ctrl */ if (pd->reg_ldo_mode) MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x1dc, 0x25); else MIPI_OUTP((ctrl_pdata->phy_io.base) + 0x1dc, 0x00); Loading