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Commit 21f130a2 authored by David S. Miller's avatar David S. Miller
Browse files

Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6

parents bc5e8fdf c58ec932

CREDITS

+14 −12
Original line number Diff line number Diff line
@@ -2211,6 +2211,15 @@ D: OV511 driver 
S: (address available on request)

S: USA



N: Ian McDonald

E: iam4@cs.waikato.ac.nz

E: imcdnzl@gmail.com

W: http://wand.net.nz/~iam4

W: http://imcdnzl.blogspot.com

D: DCCP, CCID3

S: Hamilton

S: New Zealand



N: Patrick McHardy

E: kaber@trash.net

P: 1024D/12155E80 B128 7DE6 FF0A C2B2 48BE  AB4C C9D4 964E 1215 5E80
@@ -2246,19 +2255,12 @@ S: D-90453 Nuernberg 
S: Germany



N: Arnaldo Carvalho de Melo

E: acme@conectiva.com.br

E: acme@kernel.org

E: acme@gnu.org

W: http://bazar2.conectiva.com.br/~acme

W: http://advogato.org/person/acme

E: acme@mandriva.com

E: acme@ghostprotocols.net

W: http://oops.ghostprotocols.net:81/blog/

P: 1024D/9224DF01 D5DF E3BB E3C8 BCBB F8AD  841A B6AB 4681 9224 DF01

D: wanrouter hacking

D: misc Makefile, Config.in, drivers and network stacks fixes

D: IPX & LLC network stacks maintainer

D: Cyclom 2X synchronous card driver

D: wl3501 PCMCIA wireless card driver

D: i18n for minicom, net-tools, util-linux, fetchmail, etc

S: Conectiva S.A.

D: IPX, LLC, DCCP, cyc2x, wl3501_cs, net/ hacks

S: Mandriva

S: R. Tocantins, 89 - Cristo Rei

S: 80050-430 - Curitiba - Paran

S: Brazil

MAINTAINERS

+7 −6
Original line number Diff line number Diff line
@@ -686,6 +686,13 @@ P: Guennadi Liakhovetski 
M:	g.liakhovetski@gmx.de

S:	Maintained



DCCP PROTOCOL

P:	Arnaldo Carvalho de Melo

M:	acme@mandriva.com

L:	dccp@vger.kernel.org

W:	http://www.wlug.org.nz/DCCP

S:	Maintained



DECnet NETWORK LAYER

P:	Patrick Caulfield

M:	patrick@tykepenguin.com
@@ -2271,12 +2278,6 @@ M: R.E.Wolff@BitWizard.nl 
L:	linux-kernel@vger.kernel.org ?

S:	Supported



SPX NETWORK LAYER

P:	Jay Schulist

M:	jschlst@samba.org

L:	netdev@vger.kernel.org

S:	Supported



SRM (Alpha) environment access

P:	Jan-Benedict Glaw

M:	jbglaw@lug-owl.de

drivers/net/tg3.c

+47 −61
Original line number Diff line number Diff line
@@ -67,8 +67,8 @@ 


#define DRV_MODULE_NAME		"tg3"

#define PFX DRV_MODULE_NAME	": "

#define DRV_MODULE_VERSION	"3.39"

#define DRV_MODULE_RELDATE	"September 5, 2005"

#define DRV_MODULE_VERSION	"3.40"

#define DRV_MODULE_RELDATE	"September 15, 2005"



#define TG3_DEF_MAC_MODE	0

#define TG3_DEF_RX_MODE		0
@@ -3442,30 +3442,46 @@ static void tg3_tx_timeout(struct net_device *dev) 
	schedule_work(&tp->reset_task);

}



/* Test for DMA buffers crossing any 4GB boundaries: 4G, 8G, etc */

static inline int tg3_4g_overflow_test(dma_addr_t mapping, int len)

{

	u32 base = (u32) mapping & 0xffffffff;



	return ((base > 0xffffdcc0) &&

		(base + len + 8 < base));

}



static void tg3_set_txd(struct tg3 *, int, dma_addr_t, int, u32, u32);



static int tigon3_4gb_hwbug_workaround(struct tg3 *tp, struct sk_buff *skb,

				       u32 guilty_entry, int guilty_len,

				       u32 last_plus_one, u32 *start, u32 mss)

				       u32 last_plus_one, u32 *start,

				       u32 base_flags, u32 mss)

{

	struct sk_buff *new_skb = skb_copy(skb, GFP_ATOMIC);

	dma_addr_t new_addr;

	dma_addr_t new_addr = 0;

	u32 entry = *start;

	int i;

	int i, ret = 0;



	if (!new_skb) {

		dev_kfree_skb(skb);

		return -1;

	}



		ret = -1;

	} else {

		/* New SKB is guaranteed to be linear. */

		entry = *start;

		new_addr = pci_map_single(tp->pdev, new_skb->data, new_skb->len,

					  PCI_DMA_TODEVICE);

		/* Make sure new skb does not cross any 4G boundaries.

		 * Drop the packet if it does.

		 */

		if (tg3_4g_overflow_test(new_addr, new_skb->len)) {

			ret = -1;

			dev_kfree_skb(new_skb);

			new_skb = NULL;

		} else {

			tg3_set_txd(tp, entry, new_addr, new_skb->len,

		    (skb->ip_summed == CHECKSUM_HW) ?

		    TXD_FLAG_TCPUDP_CSUM : 0, 1 | (mss << 1));

				    base_flags, 1 | (mss << 1));

			*start = NEXT_TX(entry);

		}

	}



	/* Now clean up the sw ring entries. */

	i = 0;
@@ -3491,7 +3507,7 @@ static int tigon3_4gb_hwbug_workaround(struct tg3 *tp, struct sk_buff *skb, 


	dev_kfree_skb(skb);



	return 0;

	return ret;

}



static void tg3_set_txd(struct tg3 *tp, int entry,
@@ -3517,19 +3533,10 @@ static void tg3_set_txd(struct tg3 *tp, int entry, 
	txd->vlan_tag = vlan_tag << TXD_VLAN_TAG_SHIFT;

}



static inline int tg3_4g_overflow_test(dma_addr_t mapping, int len)

{

	u32 base = (u32) mapping & 0xffffffff;



	return ((base > 0xffffdcc0) &&

		(base + len + 8 < base));

}



static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)

{

	struct tg3 *tp = netdev_priv(dev);

	dma_addr_t mapping;

	unsigned int i;

	u32 len, entry, base_flags, mss;

	int would_hit_hwbug;
@@ -3624,7 +3631,7 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) 
	would_hit_hwbug = 0;



	if (tg3_4g_overflow_test(mapping, len))

		would_hit_hwbug = entry + 1;

		would_hit_hwbug = 1;



	tg3_set_txd(tp, entry, mapping, len, base_flags,

		    (skb_shinfo(skb)->nr_frags == 0) | (mss << 1));
@@ -3648,12 +3655,8 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) 
			tp->tx_buffers[entry].skb = NULL;

			pci_unmap_addr_set(&tp->tx_buffers[entry], mapping, mapping);



			if (tg3_4g_overflow_test(mapping, len)) {

				/* Only one should match. */

				if (would_hit_hwbug)

					BUG();

				would_hit_hwbug = entry + 1;

			}

			if (tg3_4g_overflow_test(mapping, len))

				would_hit_hwbug = 1;



			if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)

				tg3_set_txd(tp, entry, mapping, len,
@@ -3669,34 +3672,15 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) 
	if (would_hit_hwbug) {

		u32 last_plus_one = entry;

		u32 start;

		unsigned int len = 0;



		would_hit_hwbug -= 1;

		entry = entry - 1 - skb_shinfo(skb)->nr_frags;

		entry &= (TG3_TX_RING_SIZE - 1);

		start = entry;

		i = 0;

		while (entry != last_plus_one) {

			if (i == 0)

				len = skb_headlen(skb);

			else

				len = skb_shinfo(skb)->frags[i-1].size;



			if (entry == would_hit_hwbug)

				break;



			i++;

			entry = NEXT_TX(entry);



		}

		start = entry - 1 - skb_shinfo(skb)->nr_frags;

		start &= (TG3_TX_RING_SIZE - 1);



		/* If the workaround fails due to memory/mapping

		 * failure, silently drop this packet.

		 */

		if (tigon3_4gb_hwbug_workaround(tp, skb,

						entry, len,

						last_plus_one,

						&start, mss))

		if (tigon3_4gb_hwbug_workaround(tp, skb, last_plus_one,

						&start, base_flags, mss))

			goto out_unlock;



		entry = start;
@@ -9271,6 +9255,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) 
	static struct pci_device_id write_reorder_chipsets[] = {

		{ PCI_DEVICE(PCI_VENDOR_ID_AMD,

		             PCI_DEVICE_ID_AMD_FE_GATE_700C) },

		{ PCI_DEVICE(PCI_VENDOR_ID_AMD,

		             PCI_DEVICE_ID_AMD_K8_NB) },

		{ },

	};

	u32 misc_ctrl_reg;
@@ -9285,7 +9271,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) 
		tp->tg3_flags2 |= TG3_FLG2_SUN_570X;

#endif



	/* If we have an AMD 762 chipset, write

	/* If we have an AMD 762 or K8 chipset, write

	 * reordering to the mailbox registers done by the host

	 * controller can cause major troubles.  We read back from

	 * every mailbox register write to force the writes to be
@@ -9532,7 +9518,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) 
		tp->write32_rx_mbox = tg3_write_indirect_mbox;



		iounmap(tp->regs);

		tp->regs = 0;

		tp->regs = NULL;



		pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);

		pci_cmd &= ~PCI_COMMAND_MEMORY;
@@ -10680,7 +10666,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, 
err_out_iounmap:

	if (tp->regs) {

		iounmap(tp->regs);

		tp->regs = 0;

		tp->regs = NULL;

	}



err_out_free_dev:
@@ -10705,7 +10691,7 @@ static void __devexit tg3_remove_one(struct pci_dev *pdev) 
		unregister_netdev(dev);

		if (tp->regs) {

			iounmap(tp->regs);

			tp->regs = 0;

			tp->regs = NULL;

		}

		free_netdev(dev);

		pci_release_regions(pdev);

include/linux/dccp.h

+29 −11
Original line number Diff line number Diff line
@@ -4,16 +4,6 @@ 
#include <linux/types.h>

#include <asm/byteorder.h>



/* Structure describing an Internet (DCCP) socket address. */

struct sockaddr_dccp {

	__u16	sdccp_family;	/* Address family   */

	__u16	sdccp_port;	/* Port number	    */

	__u32	sdccp_addr;	/* Internet address */

	__u32	sdccp_service;	/* Service	    */

	/* Pad to size of `struct sockaddr': 16 bytes . */

	__u32	sdccp_pad;

};



/**

 * struct dccp_hdr - generic part of DCCP packet header

 *
@@ -188,6 +178,9 @@ enum { 


/* DCCP socket options */

#define DCCP_SOCKOPT_PACKET_SIZE	1

#define DCCP_SOCKOPT_SERVICE		2



#define DCCP_SERVICE_LIST_MAX_LEN      32



#ifdef __KERNEL__
@@ -382,6 +375,25 @@ enum dccp_role { 
	DCCP_ROLE_SERVER,

};



struct dccp_service_list {

	__u32	dccpsl_nr;

	__u32	dccpsl_list[0];

};



#define DCCP_SERVICE_INVALID_VALUE htonl((__u32)-1)



static inline int dccp_list_has_service(const struct dccp_service_list *sl,

					const u32 service)

{

	if (likely(sl != NULL)) {

		u32 i = sl->dccpsl_nr;

		while (i--)

			if (sl->dccpsl_list[i] == service)

				return 1; 

	}

	return 0;

}



/**

 * struct dccp_sock - DCCP socket state

 *
@@ -417,7 +429,8 @@ struct dccp_sock { 
	__u64				dccps_gss;

	__u64				dccps_gsr;

	__u64				dccps_gar;

	unsigned long			dccps_service;

	__u32				dccps_service;

	struct dccp_service_list	*dccps_service_list;

	struct timeval			dccps_timestamp_time;

	__u32				dccps_timestamp_echo;

	__u32				dccps_packet_size;
@@ -443,6 +456,11 @@ static inline struct dccp_sock *dccp_sk(const struct sock *sk) 
	return (struct dccp_sock *)sk;

}



static inline int dccp_service_not_initialized(const struct sock *sk)

{

	return dccp_sk(sk)->dccps_service == DCCP_SERVICE_INVALID_VALUE;

}



static inline const char *dccp_role(const struct sock *sk)

{

	switch (dccp_sk(sk)->dccps_role) {

include/linux/pci_ids.h

+1 −0
Original line number Diff line number Diff line
@@ -491,6 +491,7 @@ 
#define PCI_DEVICE_ID_AMI_MEGARAID2	0x9060



#define PCI_VENDOR_ID_AMD		0x1022

#define PCI_DEVICE_ID_AMD_K8_NB		0x1100

#define PCI_DEVICE_ID_AMD_LANCE		0x2000

#define PCI_DEVICE_ID_AMD_LANCE_HOME	0x2001

#define PCI_DEVICE_ID_AMD_SCSI		0x2020