Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1fd8f878 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm: emac: fix timestamping sync"

parents cf03e961 12d6e40d

drivers/net/ethernet/msm/emac/emac_defines.h

+4 −0
Original line number Diff line number Diff line
@@ -279,6 +279,10 @@ 
#define H1TPD_PROD_IDX_SHFT                                           0



/* EMAC_EMAC_WRAPPER_CSR1 */

#define TX_INDX_FIFO_SYNC_RST                                  0x800000

#define TX_TS_FIFO_SYNC_RST                                    0x400000

#define RX_TS_FIFO2_SYNC_RST                                   0x200000

#define RX_TS_FIFO1_SYNC_RST                                   0x100000

#define TX_TS_ENABLE                                            0x10000

#define DIS_1588_CLKS                                             0x800

#define FREQ_MODE                                                 0x200

drivers/net/ethernet/msm/emac/emac_ptp.c

+32 −1
Original line number Diff line number Diff line
@@ -18,6 +18,10 @@ 
#include "emac_hw.h"

#include "emac_ptp.h"



#define TS_TX_FIFO_SYNC_RST (TX_INDX_FIFO_SYNC_RST | TX_TS_FIFO_SYNC_RST)

#define TS_RX_FIFO_SYNC_RST (RX_TS_FIFO1_SYNC_RST  | RX_TS_FIFO2_SYNC_RST)

#define TS_FIFO_SYNC_RST    (TS_TX_FIFO_SYNC_RST | TS_RX_FIFO_SYNC_RST)



static inline u32 clk_to_ptp_inc_value(u32 clk)

{

	u32 ns = 1000000000/clk;
@@ -44,7 +48,8 @@ static int emac_hw_1588_core_disable(struct emac_hw *hw) 
			  DIS_1588_CLKS, DIS_1588_CLKS);

	emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR10,

			  DIS_1588, DIS_1588);

	emac_reg_update32(hw, EMAC_1588, EMAC_P1588_CTRL_REG, 0, BYPASS_O);

	emac_reg_update32(hw, EMAC_1588, EMAC_P1588_CTRL_REG,

			  BYPASS_O, BYPASS_O);

	emac_reg_w32(hw, EMAC_1588, EMAC_P1588_PTP_EXPANDED_INT_MASK, 0);

	wmb();
@@ -98,6 +103,14 @@ static int emac_hw_1588_core_enable(struct emac_hw *hw, 


	v = emac_reg_r32(hw, EMAC_1588, EMAC_P1588_PTP_EXPANDED_INT_STATUS);



	/* Reset the timestamp FIFO */

	emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1,

			  TS_FIFO_SYNC_RST, TS_FIFO_SYNC_RST);

	wmb();

	emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1,

			  TS_FIFO_SYNC_RST, 0);

	wmb();



	SET_HW_FLAG(PTP_EN);

	return 0;

}
@@ -282,6 +295,15 @@ int emac_tstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 
	case HWTSTAMP_TX_ON:

		if (CHK_HW_FLAG(TS_TX_EN))

			break;



		/* Reset the TX timestamp FIFO */

		emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1,

				  TS_TX_FIFO_SYNC_RST, TS_TX_FIFO_SYNC_RST);

		wmb();

		emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1,

				  TS_TX_FIFO_SYNC_RST, 0);

		wmb();



		emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1,

				  TX_TS_ENABLE, TX_TS_ENABLE);

		wmb();
@@ -299,6 +321,15 @@ int emac_tstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 
		cfg.rx_filter = HWTSTAMP_FILTER_ALL;

		if (CHK_HW_FLAG(TS_RX_EN))

			break;



		/* Reset the RX timestamp FIFO */

		emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1,

				  TS_RX_FIFO_SYNC_RST, TS_RX_FIFO_SYNC_RST);

		wmb();

		emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1,

				  TS_RX_FIFO_SYNC_RST, 0);

		wmb();



		SET_HW_FLAG(TS_RX_EN);

		break;

	}