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Commit 1fb7ca1e authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add smb1357 charger device node for msmzirc MTP/CDP"

parents 45c73c06 4b487197

arch/arm/boot/dts/qcom/msmzirc-cdp.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -35,3 +35,18 @@ 
		rst-gpio = <&msm_gpio 89 0>;

	};

};



&i2c_3 {

	smb1357_otg_supply: smb1357-charger@1c {

		compatible = "qcom,smb1357-charger";

		reg = <0x1c>;

		interrupt-parent = <&msm_gpio>;

		interrupts = <83 0>;	/* MDM GPIO 83 */

		qcom,float-voltage-mv = <4200>;

		qcom,charging-timeout = <1536>;

		qcom,recharge-thresh-mv = <200>;

		qcom,iterm-ma = <100>;

		regulator-name = "smb1357_otg_supply";

		qcom,charging-disabled;

	};

};

arch/arm/boot/dts/qcom/msmzirc-mtp.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -35,3 +35,17 @@ 
		rst-gpio = <&msm_gpio 20 0>;

	};

};



&i2c_3 {

	smb1357_otg_supply: smb1357-charger@1c {

		compatible = "qcom,smb1357-charger";

		reg = <0x1c>;

		interrupt-parent = <&msm_gpio>;

		interrupts = <83 0>;	/* MDM GPIO 83 */

		qcom,float-voltage-mv = <4200>;

		qcom,charging-timeout = <1536>;

		qcom,recharge-thresh-mv = <200>;

		qcom,iterm-ma = <100>;

		regulator-name = "smb1357_otg_supply";

	};

};

arch/arm/boot/dts/qcom/msmzirc-pinctrl.dtsi

+17 −0
Original line number Diff line number Diff line
@@ -568,5 +568,22 @@ 
				bias-disable = <0>; /* No PULL */

			};

		};



		pmx_i2c_3 {

			qcom,pins = <&gp 10>, <&gp 11>;

			qcom,num-grp-pins = <2>;

			qcom,pin-func = <4>;

			label = "i2c_3";



			i2c_3_active: i2c_3_active {

				drive-strength = <2>;

				bias-disable;

			};



			i2c_3_sleep: i2c_3_sleep {

				drive-strength = <2>;

				bias-disable;

			};

		};

	};

};

arch/arm/boot/dts/qcom/msmzirc.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
		spi0 = &spi_0;

		spi1 = &spi_1;

		i2c2 = &i2c_2;

		i2c3 = &i2c_3;

	};



	memory {
@@ -307,6 +308,31 @@ 
		qcom,master-id = <86>;

	};



	i2c_3: i2c@78b7000 { /* BLSP1 QUP3 */

		compatible = "qcom,i2c-msm-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "qup_phys_addr", "bam_phys_addr";

		reg = <0x78b7000 0x1000>,

			<0x7884000 0x19000>;

		interrupt-names = "qup_irq", "bam_irq";

		interrupts = <0 97 0>, <0 238 0>;

		qcom,clk-freq-out = <400000>;

		qcom,clk-freq-in  = <19200000>;

		clock-names = "iface_clk", "core_clk";

		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,

		<&clock_gcc clk_gcc_blsp1_qup3_i2c_apps_clk>;



		pinctrl-names = "i2c_active", "i2c_sleep";

		pinctrl-0 = <&i2c_3_active>;

		pinctrl-1 = <&i2c_3_sleep>;

		qcom,noise-rjct-scl = <0>;

		qcom,noise-rjct-sda = <0>;

		qcom,bam-pipe-idx-cons = <16>;

		qcom,bam-pipe-idx-prod = <17>;

		qcom,master-id = <86>;

	};



	spmi_bus: qcom,spmi@200f000 {

		compatible = "qcom,spmi-pmic-arb";

		reg = <0x200f000 0x1000>,