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Commit 1e16cc7c authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Configure SPI on BLSP1 QUP3 for 8939"

parents 39bb2cfb 6eacdf89
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+50 −0
Original line number Original line Diff line number Diff line
@@ -168,5 +168,55 @@
				bias-disable;	      /* No PULL */
				bias-disable;	      /* No PULL */
			};
			};
		};
		};

		 spi0_active {
                        /* MOSI, MISO, CLK */
                        qcom,pins = <&gp 8>, <&gp 9>, <&gp 11>;
                        qcom,num-grp-pins = <3>;
                        qcom,pin-func = <1>;
                        label = "spi0-active";
                        /* active state */
                        spi0_default: default {
                                drive-strength = <12>; /* 12 MA */
                                bias-disable = <0>; /* No PULL */
                        };
                };

                spi0_suspend {
                        /* MOSI, MISO, CLK */
                        qcom,pins = <&gp 8>, <&gp 9>, <&gp 11>;
                        qcom,num-grp-pins = <3>;
                        qcom,pin-func = <0>;
                        label = "spi0-suspend";
                        /* suspended state */
                        spi0_sleep: sleep {
                                drive-strength = <2>; /* 2 MA */
                                bias-disable = <0>; /* No PULL */
                        };
                };

                spi0_cs0_active {
                        /* CS */
                        qcom,pins = <&gp 10>;
                        qcom,num-grp-pins = <1>;
                        qcom,pin-func = <1>;
                        label = "spi0-cs0-active";
                        spi0_cs0_active: cs0_active {
                                drive-strength = <2>;
                                bias-disable = <0>;
                        };
                };

                spi0_cs0_suspend {
                        /* CS */
                        qcom,pins = <&gp 10>;
                        qcom,num-grp-pins = <1>;
                        qcom,pin-func = <0>;
                        label = "spi0-cs0-suspend";
                        spi0_cs0_sleep: cs0_sleep {
                                drive-strength = <2>;
                                bias-disable = <0>;
                        };
                };
	};
	};
};
};
+27 −0
Original line number Original line Diff line number Diff line
@@ -33,6 +33,7 @@
		smd21 = &smdtty_data21;
		smd21 = &smdtty_data21;
		smd36 = &smdtty_loopback;
		smd36 = &smdtty_loopback;
		i2c0 = &i2c_0;
		i2c0 = &i2c_0;
		spi0 = &spi_0;
	};
	};


	cpus {
	cpus {
@@ -628,6 +629,32 @@
		qcom,bam-pipe-idx-prod = <7>;
		qcom,bam-pipe-idx-prod = <7>;
		qcom,master-id = <86>;
		qcom,master-id = <86>;
	};
	};

	spi_0: spi@78b7000 { /* BLSP1 QUP3 */
		compatible = "qcom,spi-qup-v2";
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "spi_physical", "spi_bam_physical";
		reg = <0x78b7000 0x600>,
			<0x7884000 0x23000>;
		interrupt-names = "spi_irq", "spi_bam_irq";
		interrupts = <0 97 0>, <0 238 0>;
		spi-max-frequency = <19200000>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&spi0_default &spi0_cs0_active>;
		pinctrl-1 = <&spi0_sleep &spi0_cs0_sleep>;
		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
			<&clock_gcc clk_gcc_blsp1_qup3_spi_apps_clk>;
		clock-names = "iface_clk", "core_clk";
		qcom,infinite-mode = <0>;
		qcom,use-bam;
		qcom,use-pinctrl;
		qcom,ver-reg-exists;
		qcom,bam-consumer-pipe-index = <8>;
		qcom,bam-producer-pipe-index = <9>;
		qcom,master-id = <86>;
		};

	spmi_bus: qcom,spmi@200f000 {
	spmi_bus: qcom,spmi@200f000 {
		compatible = "qcom,spmi-pmic-arb";
		compatible = "qcom,spmi-pmic-arb";
		reg = <0x200f000 0x1000>,
		reg = <0x200f000 0x1000>,