Loading arch/arm/mach-msm/include/mach/iommu_hw-v1.h +4 −0 Original line number Diff line number Diff line Loading @@ -171,6 +171,8 @@ do { \ SET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, HALT_REQ, v) #define GET_MICRO_MMU_CTRL_IDLE(b) \ GET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, IDLE) #define SET_MICRO_MMU_CTRL_RESERVED(b, v) \ SET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, RESERVED, v) #define SET_PREDICTIONDIS0(b, v) SET_GLOBAL_REG(PREDICTIONDIS0, (b), (v)) #define SET_PREDICTIONDIS1(b, v) SET_GLOBAL_REG(PREDICTIONDIS1, (b), (v)) #define SET_S1L1BFBLP0(b, v) SET_GLOBAL_REG(S1L1BFBLP0, (b), (v)) Loading Loading @@ -1687,6 +1689,7 @@ do { \ #define CBFRSYNRA_SID_MASK 0x7FFF /* Implementation defined register space masks */ #define MICRO_MMU_CTRL_RESERVED_MASK 0x03 #define MICRO_MMU_CTRL_HALT_REQ_MASK 0x01 #define MICRO_MMU_CTRL_IDLE_MASK 0x01 Loading Loading @@ -2071,6 +2074,7 @@ do { \ #define CBFRSYNRA_SID_SHIFT 0 /* Implementation defined register space shift */ #define MICRO_MMU_CTRL_RESERVED_SHIFT 0x00 #define MICRO_MMU_CTRL_HALT_REQ_SHIFT 0x02 #define MICRO_MMU_CTRL_IDLE_SHIFT 0x03 Loading drivers/iommu/msm_iommu-v1.c +1 −0 Original line number Diff line number Diff line Loading @@ -676,6 +676,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) goto unlock; } } SET_MICRO_MMU_CTRL_RESERVED(iommu_drvdata->base, 0x3); program_iommu_bfb_settings(iommu_drvdata->base, iommu_drvdata->bfb_settings); set_m2v = true; Loading drivers/iommu/msm_iommu_sec.c +1 −0 Original line number Diff line number Diff line Loading @@ -566,6 +566,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = msm_iommu_sec_program_iommu(iommu_drvdata->sec_id); SET_MICRO_MMU_CTRL_RESERVED(iommu_drvdata->base, 0x3); /* bfb settings are always programmed by HLOS */ program_iommu_bfb_settings(iommu_drvdata->base, iommu_drvdata->bfb_settings); Loading Loading
arch/arm/mach-msm/include/mach/iommu_hw-v1.h +4 −0 Original line number Diff line number Diff line Loading @@ -171,6 +171,8 @@ do { \ SET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, HALT_REQ, v) #define GET_MICRO_MMU_CTRL_IDLE(b) \ GET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, IDLE) #define SET_MICRO_MMU_CTRL_RESERVED(b, v) \ SET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, RESERVED, v) #define SET_PREDICTIONDIS0(b, v) SET_GLOBAL_REG(PREDICTIONDIS0, (b), (v)) #define SET_PREDICTIONDIS1(b, v) SET_GLOBAL_REG(PREDICTIONDIS1, (b), (v)) #define SET_S1L1BFBLP0(b, v) SET_GLOBAL_REG(S1L1BFBLP0, (b), (v)) Loading Loading @@ -1687,6 +1689,7 @@ do { \ #define CBFRSYNRA_SID_MASK 0x7FFF /* Implementation defined register space masks */ #define MICRO_MMU_CTRL_RESERVED_MASK 0x03 #define MICRO_MMU_CTRL_HALT_REQ_MASK 0x01 #define MICRO_MMU_CTRL_IDLE_MASK 0x01 Loading Loading @@ -2071,6 +2074,7 @@ do { \ #define CBFRSYNRA_SID_SHIFT 0 /* Implementation defined register space shift */ #define MICRO_MMU_CTRL_RESERVED_SHIFT 0x00 #define MICRO_MMU_CTRL_HALT_REQ_SHIFT 0x02 #define MICRO_MMU_CTRL_IDLE_SHIFT 0x03 Loading
drivers/iommu/msm_iommu-v1.c +1 −0 Original line number Diff line number Diff line Loading @@ -676,6 +676,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) goto unlock; } } SET_MICRO_MMU_CTRL_RESERVED(iommu_drvdata->base, 0x3); program_iommu_bfb_settings(iommu_drvdata->base, iommu_drvdata->bfb_settings); set_m2v = true; Loading
drivers/iommu/msm_iommu_sec.c +1 −0 Original line number Diff line number Diff line Loading @@ -566,6 +566,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = msm_iommu_sec_program_iommu(iommu_drvdata->sec_id); SET_MICRO_MMU_CTRL_RESERVED(iommu_drvdata->base, 0x3); /* bfb settings are always programmed by HLOS */ program_iommu_bfb_settings(iommu_drvdata->base, iommu_drvdata->bfb_settings); Loading