Loading Documentation/devicetree/bindings/arm/msm/clock-cpu-8994.txt +2 −2 Original line number Diff line number Diff line Qualcomm MSM8994 CPU clock tree clock-cpu-8994 is a device that represents the MSM8994 CPU subsystem clock-cpu-8994 is a device that represents the MSM8994 or MSM8992 CPU subsystem clock tree. It lists the various power supplies that need to be scaled when the clocks are scaled and also other HW specific parameters like fmax tables, avs settings table, etc. Required properties: - compatible: Must be one of "qcom,clock-cpu-8994" or "qcom,clock-cpu-8994-v2" "qcom,clock-cpu-8994-v2" or "qcom,cpu-clock-8992" - reg: Pairs of physical base addresses and region sizes of memory mapped registers. - reg-names: Names of the bases for the above registers. Expected Loading drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ obj-$(CONFIG_ARCH_MSM8994) += clock-cpu-8994.o obj-$(CONFIG_ARCH_MSM8992) += clock-rpm-8992.o obj-$(CONFIG_ARCH_MSM8992) += clock-gcc-8992.o obj-$(CONFIG_ARCH_MSM8992) += clock-mmss-8992.o obj-$(CONFIG_ARCH_MSM8992) += clock-cpu-8994.o # MSM8936 obj-$(CONFIG_ARCH_MSM8916) += clock-rpm-8936.o Loading drivers/clk/qcom/clock-cpu-8994.c +17 −5 Original line number Diff line number Diff line Loading @@ -34,6 +34,7 @@ #include <soc/qcom/clock-alpha-pll.h> #include <dt-bindings/clock/msm-clocks-8994.h> #include <dt-bindings/clock/msm-clocks-8992.h> #include "clock.h" #include "vdd-level-8994.h" Loading Loading @@ -160,6 +161,7 @@ DEFINE_EXT_CLK(xo_ao, NULL); DEFINE_EXT_CLK(sys_apcsaux_clk, NULL); static bool msm8994_v2; static bool msm8992; static struct pll_clk a57_pll0 = { .mode_reg = (void __iomem *)C1_PLL_MODE, Loading Loading @@ -1053,6 +1055,7 @@ static struct clk_lookup cpu_clocks_8994[] = { CLK_LIST(cpu_debug_mux), }; /* List of clocks applicable to both 8994v2 and 8992 */ static struct clk_lookup cpu_clocks_8994_v2[] = { CLK_LIST(a53_clk), Loading Loading @@ -1779,7 +1782,7 @@ static int cpu_clock_8994_driver_probe(struct platform_device *pdev) u32 pte_efuse; char a57speedbinstr[] = "qcom,a57-speedbinXX-vXX"; v2 = msm8994_v2; v2 = msm8994_v2 | msm8992; cpu_clock_8994_dev = pdev; a53_pll0_main.c.flags = CLKFLAG_NO_RATE_CACHE; Loading Loading @@ -1921,6 +1924,7 @@ static int cpu_clock_8994_driver_probe(struct platform_device *pdev) static struct of_device_id match_table[] = { { .compatible = "qcom,cpu-clock-8994" }, { .compatible = "qcom,cpu-clock-8994-v2" }, { .compatible = "qcom,cpu-clock-8992" }, {} }; Loading Loading @@ -1962,9 +1966,8 @@ int __init cpu_clock_8994_init_a57_v2(void) { int ret = 0; pr_info("clock-cpu-8994-v2: configuring clocks for the A57 cluster\n"); msm8994_v2 = true; pr_info("%s: configuring clocks for the A57 cluster\n", msm8992 ? "msm8992" : "msm8994-v2"); vbases[ALIAS0_GLB_BASE] = ioremap(ALIAS0_GLB_BASE_PHY, SZ_4K); if (!vbases[ALIAS0_GLB_BASE]) { Loading @@ -1989,7 +1992,8 @@ int __init cpu_clock_8994_init_a57_v2(void) mb(); udelay(5); pr_cont("clock-cpu-8994-v2: finished configuring A57 cluster clocks.\n"); pr_cont("%s: finished configuring A57 cluster clocks.\n", msm8992 ? "msm8992" : "msm8994-v2"); iounmap(vbases[ALIAS1_GLB_BASE]); iomap_fail: Loading @@ -2008,6 +2012,14 @@ int __init cpu_clock_8994_init_a57(void) ofnode = of_find_compatible_node(NULL, NULL, "qcom,cpu-clock-8994-v2"); if (ofnode) msm8994_v2 = true; ofnode = of_find_compatible_node(NULL, NULL, "qcom,cpu-clock-8992"); if (ofnode) msm8992 = true; if (msm8994_v2 || msm8992) return cpu_clock_8994_init_a57_v2(); ofnode = of_find_compatible_node(NULL, NULL, Loading include/dt-bindings/clock/msm-clocks-8992.h +4 −4 Original line number Diff line number Diff line Loading @@ -390,8 +390,8 @@ #define clk_a57_pll1 0x546813fa #define clk_a57_pll0_main 0xe2f766a8 #define clk_a57_pll1_main 0xe231d575 #define clk_a57_hf_mux 0x11a12cf4 #define clk_a57_lf_mux 0xc4923785 #define clk_a57_hf_mux_v2 0xf03c6e30 #define clk_a57_lf_mux_v2 0xcc0c0f08 #define clk_a57_lf_mux_div 0xac0c1150 #define clk_a57_div_clk 0x4fdce8aa #define clk_a53_clk 0x5c9f8836 Loading @@ -399,8 +399,8 @@ #define clk_a53_pll1 0xdc2957a1 #define clk_a53_pll0_main 0xb2cc34c0 #define clk_a53_pll1_main 0x4fea3e81 #define clk_a53_hf_mux 0xae9fcd1a #define clk_a53_lf_mux 0x541f1e40 #define clk_a53_hf_mux_v2 0xae5899af #define clk_a53_lf_mux_v2 0x073a2e36 #define clk_a53_lf_mux_div 0x6ae626e5 #define clk_a53_div_clk 0x6006022b #define clk_cci_clk 0x96854074 Loading Loading
Documentation/devicetree/bindings/arm/msm/clock-cpu-8994.txt +2 −2 Original line number Diff line number Diff line Qualcomm MSM8994 CPU clock tree clock-cpu-8994 is a device that represents the MSM8994 CPU subsystem clock-cpu-8994 is a device that represents the MSM8994 or MSM8992 CPU subsystem clock tree. It lists the various power supplies that need to be scaled when the clocks are scaled and also other HW specific parameters like fmax tables, avs settings table, etc. Required properties: - compatible: Must be one of "qcom,clock-cpu-8994" or "qcom,clock-cpu-8994-v2" "qcom,clock-cpu-8994-v2" or "qcom,cpu-clock-8992" - reg: Pairs of physical base addresses and region sizes of memory mapped registers. - reg-names: Names of the bases for the above registers. Expected Loading
drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ obj-$(CONFIG_ARCH_MSM8994) += clock-cpu-8994.o obj-$(CONFIG_ARCH_MSM8992) += clock-rpm-8992.o obj-$(CONFIG_ARCH_MSM8992) += clock-gcc-8992.o obj-$(CONFIG_ARCH_MSM8992) += clock-mmss-8992.o obj-$(CONFIG_ARCH_MSM8992) += clock-cpu-8994.o # MSM8936 obj-$(CONFIG_ARCH_MSM8916) += clock-rpm-8936.o Loading
drivers/clk/qcom/clock-cpu-8994.c +17 −5 Original line number Diff line number Diff line Loading @@ -34,6 +34,7 @@ #include <soc/qcom/clock-alpha-pll.h> #include <dt-bindings/clock/msm-clocks-8994.h> #include <dt-bindings/clock/msm-clocks-8992.h> #include "clock.h" #include "vdd-level-8994.h" Loading Loading @@ -160,6 +161,7 @@ DEFINE_EXT_CLK(xo_ao, NULL); DEFINE_EXT_CLK(sys_apcsaux_clk, NULL); static bool msm8994_v2; static bool msm8992; static struct pll_clk a57_pll0 = { .mode_reg = (void __iomem *)C1_PLL_MODE, Loading Loading @@ -1053,6 +1055,7 @@ static struct clk_lookup cpu_clocks_8994[] = { CLK_LIST(cpu_debug_mux), }; /* List of clocks applicable to both 8994v2 and 8992 */ static struct clk_lookup cpu_clocks_8994_v2[] = { CLK_LIST(a53_clk), Loading Loading @@ -1779,7 +1782,7 @@ static int cpu_clock_8994_driver_probe(struct platform_device *pdev) u32 pte_efuse; char a57speedbinstr[] = "qcom,a57-speedbinXX-vXX"; v2 = msm8994_v2; v2 = msm8994_v2 | msm8992; cpu_clock_8994_dev = pdev; a53_pll0_main.c.flags = CLKFLAG_NO_RATE_CACHE; Loading Loading @@ -1921,6 +1924,7 @@ static int cpu_clock_8994_driver_probe(struct platform_device *pdev) static struct of_device_id match_table[] = { { .compatible = "qcom,cpu-clock-8994" }, { .compatible = "qcom,cpu-clock-8994-v2" }, { .compatible = "qcom,cpu-clock-8992" }, {} }; Loading Loading @@ -1962,9 +1966,8 @@ int __init cpu_clock_8994_init_a57_v2(void) { int ret = 0; pr_info("clock-cpu-8994-v2: configuring clocks for the A57 cluster\n"); msm8994_v2 = true; pr_info("%s: configuring clocks for the A57 cluster\n", msm8992 ? "msm8992" : "msm8994-v2"); vbases[ALIAS0_GLB_BASE] = ioremap(ALIAS0_GLB_BASE_PHY, SZ_4K); if (!vbases[ALIAS0_GLB_BASE]) { Loading @@ -1989,7 +1992,8 @@ int __init cpu_clock_8994_init_a57_v2(void) mb(); udelay(5); pr_cont("clock-cpu-8994-v2: finished configuring A57 cluster clocks.\n"); pr_cont("%s: finished configuring A57 cluster clocks.\n", msm8992 ? "msm8992" : "msm8994-v2"); iounmap(vbases[ALIAS1_GLB_BASE]); iomap_fail: Loading @@ -2008,6 +2012,14 @@ int __init cpu_clock_8994_init_a57(void) ofnode = of_find_compatible_node(NULL, NULL, "qcom,cpu-clock-8994-v2"); if (ofnode) msm8994_v2 = true; ofnode = of_find_compatible_node(NULL, NULL, "qcom,cpu-clock-8992"); if (ofnode) msm8992 = true; if (msm8994_v2 || msm8992) return cpu_clock_8994_init_a57_v2(); ofnode = of_find_compatible_node(NULL, NULL, Loading
include/dt-bindings/clock/msm-clocks-8992.h +4 −4 Original line number Diff line number Diff line Loading @@ -390,8 +390,8 @@ #define clk_a57_pll1 0x546813fa #define clk_a57_pll0_main 0xe2f766a8 #define clk_a57_pll1_main 0xe231d575 #define clk_a57_hf_mux 0x11a12cf4 #define clk_a57_lf_mux 0xc4923785 #define clk_a57_hf_mux_v2 0xf03c6e30 #define clk_a57_lf_mux_v2 0xcc0c0f08 #define clk_a57_lf_mux_div 0xac0c1150 #define clk_a57_div_clk 0x4fdce8aa #define clk_a53_clk 0x5c9f8836 Loading @@ -399,8 +399,8 @@ #define clk_a53_pll1 0xdc2957a1 #define clk_a53_pll0_main 0xb2cc34c0 #define clk_a53_pll1_main 0x4fea3e81 #define clk_a53_hf_mux 0xae9fcd1a #define clk_a53_lf_mux 0x541f1e40 #define clk_a53_hf_mux_v2 0xae5899af #define clk_a53_lf_mux_v2 0x073a2e36 #define clk_a53_lf_mux_div 0x6ae626e5 #define clk_a53_div_clk 0x6006022b #define clk_cci_clk 0x96854074 Loading