Loading arch/arm/boot/dts/qcom/msm8992-iommu-domains.dtsi 0 → 100644 +45 −0 Original line number Diff line number Diff line /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { qcom,iommu-domains { compatible = "qcom,iommu-domains"; venus_domain_ns: qcom,iommu-domain1 { label = "venus_ns"; qcom,iommu-contexts = <&venus_ns>; qcom,virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; }; venus_domain_sec_bitstream: qcom,iommu-domain2 { label = "venus_sec_bitstream"; qcom,iommu-contexts = <&venus_sec_bitstream>; qcom,virtual-addr-pool = <0x4b000000 0x12c00000>; qcom,secure-domain; }; venus_domain_sec_pixel: qcom,iommu-domain3 { label = "venus_sec_pixel"; qcom,iommu-contexts = <&venus_sec_pixel>; qcom,virtual-addr-pool = <0x25800000 0x25800000>; qcom,secure-domain; }; venus_domain_sec_non_pixel: qcom,iommu-domain4 { label = "venus_sec_non_pixel"; qcom,iommu-contexts = <&venus_sec_non_pixel>; qcom,virtual-addr-pool = <0x1000000 0x24800000>; qcom,secure-domain; }; }; }; arch/arm/boot/dts/qcom/msm8992-iommu.dtsi +262 −0 Original line number Diff line number Diff line Loading @@ -123,3 +123,265 @@ }; }; }; &venus_iommu { status = "ok"; clocks = <&clock_mmss clk_venus0_axi_clk>, <&clock_mmss clk_venus0_ahb_clk>, <&clock_mmss clk_venus0_vcodec0_clk>; clock-names = "core_clk", "iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c>; qcom,iommu-bfb-data = <0x7ffffff 0x1555 0x0 0x4 0x8 0x13607 0x140a0 0x4000 0x14020 0x0 0x0 0x94 0x114 0x0 0x0 0x0 0x0 0x0 0x0>; venus_ns: qcom,iommu-ctx@fdc8c000 { qcom,iommu-ctx-sids = <0 1 2 3 4 5 7 8 9 10 11>; }; venus_sec_bitstream: qcom,iommu-ctx@fdc8d000 { qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84 0x88 0x8a>; label = "venus_sec_bitstream"; }; venus_sec_pixel: qcom,iommu-ctx@fdc8f000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfdc8f000 0x1000>; interrupts = <0 42 0>, <0 43 0>; qcom,iommu-ctx-sids = <0x85>; label = "venus_sec_pixel"; qcom,secure-context; }; venus_sec_non_pixel: qcom,iommu-ctx@fdc90000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfdc90000 0x1000>; interrupts = <0 42 0>, <0 43 0>; qcom,iommu-ctx-sids = <0x87 0x89 0x8b 0xa0>; label = "venus_sec_non_pixel"; qcom,secure-context; }; }; &jpeg_iommu { status = "ok"; qcom,needs-alt-core-clk; qcom,needs-alt-iface-clk; clocks = <&clock_mmss clk_camss_jpeg_jpeg_axi_clk>, <&clock_mmss clk_camss_jpeg_jpeg_ahb_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>; clock-names = "core_clk", "iface_clk", "alt_iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c>; qcom,iommu-bfb-data = <0x3ffff 0x1555 0x0 0x4 0x4 0xa00 0x5229 0x1000 0x5208 0x0 0x0 0x5 0x25 0x0 0x0>; }; &kgsl_iommu { status = "ok"; qcom,iommu-secure-id = <18>; clocks = <&clock_mmss clk_oxili_gfx3d_clk>, <&clock_mmss clk_oxilicx_ahb_clk>; clock-names = "core_clk", "iface_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x2600>; qcom,iommu-bfb-data = <0x3 0x1555 0x0 0x8 0x10 0x0 0x120 0x0 0x20 0x0 0x0 0x1 0x101 0x0 0x8000>; qcom,iommu-ctx@fdb18000 { qcom,iommu-ctx-sids = <0 1>; }; qcom,iommu-ctx@fdb19000 { qcom,iommu-ctx-sids = <>; }; qcom,iommu-ctx@fdb1a000 { qcom,iommu-ctx-sids = <2>; interrupts = <0 241 0>, <0 240 0>; qcom,secure-context; }; }; &vfe_iommu { status = "ok"; qcom,needs-alt-core-clk; qcom,needs-alt-iface-clk; clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>, <&clock_mmss clk_camss_vfe_vfe_ahb_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>; clock-names = "core_clk", "iface_clk", "alt_iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014>; qcom,iommu-bfb-data = <0xfffff 0x1555 0x0 0x4 0x4 0x2400 0x8040 0x2400 0x8012 0x0 0x0 0x12 0x5a 0x0 0x0 0x0 0x0>; }; &cpp_iommu { status = "ok"; qcom,needs-alt-core-clk; qcom,needs-alt-iface-clk; clocks = <&clock_mmss clk_camss_vfe_cpp_axi_clk>, <&clock_mmss clk_camss_vfe_cpp_ahb_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>; clock-names = "core_clk", "iface_clk", "alt_iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c>; qcom,iommu-bfb-data = <0x3ff 0x1555 0x0 0x00000004 0x10 0x1400 0x164b2 0x1400 0x1640a 0x0 0x00000000 0x0000000a 0x32 0x0 0x0>; }; arch/arm/boot/dts/qcom/msm8992.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -812,3 +812,4 @@ #include "msm8992-ion.dtsi" #include "msm8992-regulator.dtsi" #include "msm8992-iommu.dtsi" #include "msm8992-iommu-domains.dtsi" Loading
arch/arm/boot/dts/qcom/msm8992-iommu-domains.dtsi 0 → 100644 +45 −0 Original line number Diff line number Diff line /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { qcom,iommu-domains { compatible = "qcom,iommu-domains"; venus_domain_ns: qcom,iommu-domain1 { label = "venus_ns"; qcom,iommu-contexts = <&venus_ns>; qcom,virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; }; venus_domain_sec_bitstream: qcom,iommu-domain2 { label = "venus_sec_bitstream"; qcom,iommu-contexts = <&venus_sec_bitstream>; qcom,virtual-addr-pool = <0x4b000000 0x12c00000>; qcom,secure-domain; }; venus_domain_sec_pixel: qcom,iommu-domain3 { label = "venus_sec_pixel"; qcom,iommu-contexts = <&venus_sec_pixel>; qcom,virtual-addr-pool = <0x25800000 0x25800000>; qcom,secure-domain; }; venus_domain_sec_non_pixel: qcom,iommu-domain4 { label = "venus_sec_non_pixel"; qcom,iommu-contexts = <&venus_sec_non_pixel>; qcom,virtual-addr-pool = <0x1000000 0x24800000>; qcom,secure-domain; }; }; };
arch/arm/boot/dts/qcom/msm8992-iommu.dtsi +262 −0 Original line number Diff line number Diff line Loading @@ -123,3 +123,265 @@ }; }; }; &venus_iommu { status = "ok"; clocks = <&clock_mmss clk_venus0_axi_clk>, <&clock_mmss clk_venus0_ahb_clk>, <&clock_mmss clk_venus0_vcodec0_clk>; clock-names = "core_clk", "iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c>; qcom,iommu-bfb-data = <0x7ffffff 0x1555 0x0 0x4 0x8 0x13607 0x140a0 0x4000 0x14020 0x0 0x0 0x94 0x114 0x0 0x0 0x0 0x0 0x0 0x0>; venus_ns: qcom,iommu-ctx@fdc8c000 { qcom,iommu-ctx-sids = <0 1 2 3 4 5 7 8 9 10 11>; }; venus_sec_bitstream: qcom,iommu-ctx@fdc8d000 { qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84 0x88 0x8a>; label = "venus_sec_bitstream"; }; venus_sec_pixel: qcom,iommu-ctx@fdc8f000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfdc8f000 0x1000>; interrupts = <0 42 0>, <0 43 0>; qcom,iommu-ctx-sids = <0x85>; label = "venus_sec_pixel"; qcom,secure-context; }; venus_sec_non_pixel: qcom,iommu-ctx@fdc90000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfdc90000 0x1000>; interrupts = <0 42 0>, <0 43 0>; qcom,iommu-ctx-sids = <0x87 0x89 0x8b 0xa0>; label = "venus_sec_non_pixel"; qcom,secure-context; }; }; &jpeg_iommu { status = "ok"; qcom,needs-alt-core-clk; qcom,needs-alt-iface-clk; clocks = <&clock_mmss clk_camss_jpeg_jpeg_axi_clk>, <&clock_mmss clk_camss_jpeg_jpeg_ahb_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>; clock-names = "core_clk", "iface_clk", "alt_iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c>; qcom,iommu-bfb-data = <0x3ffff 0x1555 0x0 0x4 0x4 0xa00 0x5229 0x1000 0x5208 0x0 0x0 0x5 0x25 0x0 0x0>; }; &kgsl_iommu { status = "ok"; qcom,iommu-secure-id = <18>; clocks = <&clock_mmss clk_oxili_gfx3d_clk>, <&clock_mmss clk_oxilicx_ahb_clk>; clock-names = "core_clk", "iface_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x2600>; qcom,iommu-bfb-data = <0x3 0x1555 0x0 0x8 0x10 0x0 0x120 0x0 0x20 0x0 0x0 0x1 0x101 0x0 0x8000>; qcom,iommu-ctx@fdb18000 { qcom,iommu-ctx-sids = <0 1>; }; qcom,iommu-ctx@fdb19000 { qcom,iommu-ctx-sids = <>; }; qcom,iommu-ctx@fdb1a000 { qcom,iommu-ctx-sids = <2>; interrupts = <0 241 0>, <0 240 0>; qcom,secure-context; }; }; &vfe_iommu { status = "ok"; qcom,needs-alt-core-clk; qcom,needs-alt-iface-clk; clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>, <&clock_mmss clk_camss_vfe_vfe_ahb_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>; clock-names = "core_clk", "iface_clk", "alt_iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014>; qcom,iommu-bfb-data = <0xfffff 0x1555 0x0 0x4 0x4 0x2400 0x8040 0x2400 0x8012 0x0 0x0 0x12 0x5a 0x0 0x0 0x0 0x0>; }; &cpp_iommu { status = "ok"; qcom,needs-alt-core-clk; qcom,needs-alt-iface-clk; clocks = <&clock_mmss clk_camss_vfe_cpp_axi_clk>, <&clock_mmss clk_camss_vfe_cpp_ahb_clk>, <&clock_mmss clk_camss_ahb_clk>, <&clock_mmss clk_camss_top_ahb_clk>; clock-names = "core_clk", "iface_clk", "alt_iface_clk", "alt_core_clk"; qcom,iommu-bfb-regs = <0x204c 0x2060 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c>; qcom,iommu-bfb-data = <0x3ff 0x1555 0x0 0x00000004 0x10 0x1400 0x164b2 0x1400 0x1640a 0x0 0x00000000 0x0000000a 0x32 0x0 0x0>; };
arch/arm/boot/dts/qcom/msm8992.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -812,3 +812,4 @@ #include "msm8992-ion.dtsi" #include "msm8992-regulator.dtsi" #include "msm8992-iommu.dtsi" #include "msm8992-iommu-domains.dtsi"
