Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1b8ee739 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "clk: qcom: clock-mmss-8994: Set NO_RATE_CACHE for display clocks"

parents 2651917c 9b81990b
Loading
Loading
Loading
Loading
+17 −1
Original line number Diff line number Diff line
/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -737,6 +737,7 @@ static struct rcg_clk pclk0_clk_src = {
		.dbg_name = "pclk0_clk_src",
		.parent = &ext_pclk0_clk_src.c,
		.ops = &clk_ops_pixel,
		.flags = CLKFLAG_NO_RATE_CACHE,
		VDD_DIG_FMAX_MAP3(LOWER, 75000000, LOW, 150000000,
				  NOMINAL, 250000000),
		CLK_INIT(pclk0_clk_src.c),
@@ -761,6 +762,7 @@ static struct rcg_clk pclk1_clk_src = {
		.dbg_name = "pclk1_clk_src",
		.parent = &ext_pclk1_clk_src.c,
		.ops = &clk_ops_pixel,
		.flags = CLKFLAG_NO_RATE_CACHE,
		VDD_DIG_FMAX_MAP3(LOWER, 75000000, LOW, 150000000,
				  NOMINAL, 250000000),
		CLK_INIT(pclk1_clk_src.c),
@@ -1114,6 +1116,7 @@ static struct rcg_clk byte0_clk_src = {
		.dbg_name = "byte0_clk_src",
		.parent = &ext_byte0_clk_src.c,
		.ops = &clk_ops_byte,
		.flags = CLKFLAG_NO_RATE_CACHE,
		VDD_DIG_FMAX_MAP3(LOWER, 60000000, LOW, 112500000,
				  NOMINAL, 187500000),
		CLK_INIT(byte0_clk_src.c),
@@ -1137,6 +1140,7 @@ static struct rcg_clk byte1_clk_src = {
		.dbg_name = "byte1_clk_src",
		.parent = &ext_byte1_clk_src.c,
		.ops = &clk_ops_byte,
		.flags = CLKFLAG_NO_RATE_CACHE,
		VDD_DIG_FMAX_MAP3(LOWER, 60000000, LOW, 112500000,
				  NOMINAL, 187500000),
		CLK_INIT(byte1_clk_src.c),
@@ -1930,6 +1934,7 @@ static struct branch_clk mdss_byte0_clk = {
		.dbg_name = "mdss_byte0_clk",
		.parent = &byte0_clk_src.c,
		.ops = &clk_ops_branch,
		.flags = CLKFLAG_NO_RATE_CACHE,
		CLK_INIT(mdss_byte0_clk.c),
	},
};
@@ -1942,6 +1947,7 @@ static struct branch_clk mdss_byte1_clk = {
		.dbg_name = "mdss_byte1_clk",
		.parent = &byte1_clk_src.c,
		.ops = &clk_ops_branch,
		.flags = CLKFLAG_NO_RATE_CACHE,
		CLK_INIT(mdss_byte1_clk.c),
	},
};
@@ -2025,6 +2031,7 @@ static struct branch_clk mdss_pclk0_clk = {
		.dbg_name = "mdss_pclk0_clk",
		.parent = &pclk0_clk_src.c,
		.ops = &clk_ops_branch,
		.flags = CLKFLAG_NO_RATE_CACHE,
		CLK_INIT(mdss_pclk0_clk.c),
	},
};
@@ -2037,6 +2044,7 @@ static struct branch_clk mdss_pclk1_clk = {
		.dbg_name = "mdss_pclk1_clk",
		.parent = &pclk1_clk_src.c,
		.ops = &clk_ops_branch,
		.flags = CLKFLAG_NO_RATE_CACHE,
		CLK_INIT(mdss_pclk1_clk.c),
	},
};
@@ -2618,12 +2626,20 @@ int msm_mmsscc_8994_probe(struct platform_device *pdev)

	ext_pclk0_clk_src.dev = &pdev->dev;
	ext_pclk0_clk_src.clk_id = "pclk0_src";
	ext_pclk0_clk_src.c.flags = CLKFLAG_NO_RATE_CACHE;

	ext_pclk1_clk_src.dev = &pdev->dev;
	ext_pclk1_clk_src.clk_id = "pclk1_src";
	ext_pclk1_clk_src.c.flags = CLKFLAG_NO_RATE_CACHE;

	ext_byte0_clk_src.dev = &pdev->dev;
	ext_byte0_clk_src.clk_id = "byte0_src";
	ext_byte0_clk_src.c.flags = CLKFLAG_NO_RATE_CACHE;

	ext_byte1_clk_src.dev = &pdev->dev;
	ext_byte1_clk_src.clk_id = "byte1_src";
	ext_byte1_clk_src.c.flags = CLKFLAG_NO_RATE_CACHE;

	ext_extpclk_clk_src.dev = &pdev->dev;
	ext_extpclk_clk_src.clk_id = "extpclk_src";