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Commit 1b2e1a7a authored by Ke Liu's avatar Ke Liu
Browse files

ARM: dts: msm: reorganize pmd9635 board specific settings



There are some board specific configurations in msm-pdm9635.dtsi. Move
these configurations into appropriate board level device tree files so
that msm-pmd9635.dtsi captures only board-independent PMIC PMD9635
configurations.

Change-Id: I0fe21661e1558fa3e416d5816679b1946b6160d1
Signed-off-by: default avatarKe Liu <keliu@codeaurora.org>
parent e589fedd
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+7 −0
Original line number Diff line number Diff line
@@ -56,9 +56,11 @@
	};

	gpio@c200 { /* GPIO 3 */
		status = "ok";
	};

	gpio@c300 { /* GPIO 4 */
		status = "ok";
	};

	gpio@c400 { /* GPIO 5 */
@@ -70,12 +72,15 @@

&pmd9635_mpps {
	mpp@a000 { /* MPP 1 */
		status = "ok";
	};

	mpp@a100 { /* MPP 2 */
		status = "ok";
	};

	mpp@a200 { /* MPP 3 */
		status = "ok";
	};

	mpp@a300 { /* MPP 4 */
@@ -85,6 +90,7 @@
		qcom,master-en = <1>;
		qcom,src-sel = <0>; /* Function constant */
		qcom,invert = <1>;
		status = "ok";
	};

	mpp@a400 { /* MPP 5 */
@@ -97,6 +103,7 @@
		qcom,master-en = <1>;
		qcom,src-sel = <0>; /* Function constant */
		qcom,invert = <1>;
		status = "ok";
	};
};

+7 −0
Original line number Diff line number Diff line
@@ -39,9 +39,11 @@
	};

	gpio@c200 { /* GPIO 3 */
		status = "ok";
	};

	gpio@c300 { /* GPIO 4 */
		status = "ok";
	};

	gpio@c400 { /* GPIO 5 */
@@ -53,12 +55,15 @@

&pmd9635_mpps {
	mpp@a000 { /* MPP 1 */
		status = "ok";
	};

	mpp@a100 { /* MPP 2 */
		status = "ok";
	};

	mpp@a200 { /* MPP 3 */
		status = "ok";
	};

	mpp@a300 { /* MPP 4 */
@@ -68,6 +73,7 @@
		qcom,master-en = <1>;
		qcom,src-sel = <0>; /* Function constant */
		qcom,invert = <1>;
		status = "ok";
	};

	mpp@a400 { /* MPP 5 */
@@ -80,6 +86,7 @@
		qcom,master-en = <1>;
		qcom,src-sel = <0>; /* Function constant */
		qcom,invert = <1>;
		status = "ok";
	};
};

+47 −0
Original line number Diff line number Diff line
@@ -70,3 +70,50 @@
		regulator-name = "smb1357_otg_supply";
	};
};

&pmd9635_gpios {
	gpio@c000 { /* GPIO 1 */
	};

	gpio@c100 { /* GPIO 2 */
	};

	gpio@c200 { /* GPIO 3 */
		status = "ok";
	};

	gpio@c300 { /* GPIO 4 */
		status = "ok";
	};

	gpio@c400 { /* GPIO 5 */
	};

	gpio@c500 { /* GPIO 6 */
	};
};

&pmd9635_mpps {
	mpp@a000 { /* MPP 1 */
		status = "ok";
	};

	mpp@a100 { /* MPP 2 */
		status = "ok";
	};

	mpp@a200 { /* MPP 3 */
		status = "ok";
	};

	mpp@a300 { /* MPP 4 */
		status = "ok";
	};

	mpp@a400 { /* MPP 5 */
	};

	mpp@a500 { /* MPP 6 */
		status = "ok";
	};
};
+12 −0
Original line number Diff line number Diff line
@@ -1151,6 +1151,18 @@
#include "msm-pmd9635.dtsi"
#include "mdm9630-regulator.dtsi"

&pmd9635_pon {
	interrupts = <0x0 0x8 0x2>;
	interrupt-names = "cblpwr";
	qcom,system-reset;

	qcom,pon_1 {
		qcom,pon-type = <2>;
		qcom,pull-up = <1>;
		linux,code = <116>;
	};
};

&pmd9635_vadc {
	chan@31 {
		label = "batt_id_therm";
+8 −9
Original line number Diff line number Diff line
@@ -22,19 +22,11 @@
			reg = <0x100 0x100>;
		};

		qcom,power-on@800 {
		pmd9635_pon: qcom,power-on@800 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x800 0x100>;
			interrupts = <0x0 0x8 0x2>;
			interrupt-names = "cblpwr";
			qcom,pon-dbc-delay = <15625>;
			qcom,system-reset;

			qcom,pon_1 {
				qcom,pon-type = <2>;
				qcom,pull-up = <1>;
				linux,code = <116>;
			};
		};

		pmd9635_gpios: gpios {
@@ -61,11 +53,13 @@
			gpio@c200 {
				reg = <0xc200 0x100>;
				qcom,pin-num = <3>;
				status = "disabled";
			};

			gpio@c300 {
				reg = <0xc300 0x100>;
				qcom,pin-num = <4>;
				status = "disabled";
			};

			gpio@c400 {
@@ -93,21 +87,25 @@
			mpp@a000 {
				reg = <0xa000 0x100>;
				qcom,pin-num = <1>;
				status = "disabled";
			};

			mpp@a100 {
				reg = <0xa100 0x100>;
				qcom,pin-num = <2>;
				status = "disabled";
			};

			mpp@a200 {
				reg = <0xa200 0x100>;
				qcom,pin-num = <3>;
				status = "disabled";
			};

			mpp@a300 {
				reg = <0xa300 0x100>;
				qcom,pin-num = <4>;
				status = "disabled";
			};

			mpp@a400 {
@@ -119,6 +117,7 @@
			mpp@a500 {
				reg = <0xa500 0x100>;
				qcom,pin-num = <6>;
				status = "disabled";
			};
		};