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Commit 1b024d2f authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Paul Walmsley
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ARM: OMAP4: hwmod data: make *phy_48m* as the main_clk of ocp2scp 



Made *ocp2scp_usb_phy_phy_48m* as the main_clk for ocp2scp.
Since this ocp2scp module does not have any fck but does have a
single opt_clock, it is added as the main_clk for ocp2scp. Also
removed phy_48m as the optional clock since it is now made as the
main clock. By this the driver need not enable/disable phy_48m clk
separately and runtime_get/runtime_put will take care of that.

Cc: Benoît Cousson <b-cousson@ti.com>
Reviewed-by: default avatarFelipe Balbi <balbi@ti.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Acked-by: default avatarBenoît Cousson <b-cousson@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 33c976ec

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+1 −6
Original line number Diff line number Diff line
@@ -2542,14 +2542,11 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = { 
};



/* ocp2scp_usb_phy */

static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = {

	{ .role = "phy_48m", .clk = "ocp2scp_usb_phy_phy_48m" },

};



static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {

	.name		= "ocp2scp_usb_phy",

	.class		= &omap44xx_ocp2scp_hwmod_class,

	.clkdm_name	= "l3_init_clkdm",

	.main_clk	= "ocp2scp_usb_phy_phy_48m",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET,
@@ -2557,8 +2554,6 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { 
			.modulemode   = MODULEMODE_HWCTRL,

		},

	},

	.opt_clks	= ocp2scp_usb_phy_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(ocp2scp_usb_phy_opt_clks),

};



/*