Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 172ee3de authored by Abhimanyu Kapur's avatar Abhimanyu Kapur
Browse files

ARM: dts: qcom: Add cpu nodes for qcom chipsets 



Add cpu nodes which describe the cpu subsystem hardware
for APQ8084, MDM9630, MSM8226, MSM8610, MSMZIRC and their
derivatives.

Change-Id: I64ba54bec83e1c2a51782091b7424cedf2a7a0fc
Signed-off-by: default avatarAbhimanyu Kapur <abhimany@codeaurora.org>
parent b5a909ab

arch/arm/boot/dts/qcom/apq8084.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -27,6 +27,35 @@ 
		spi0 = &spi_0;

	};



	cpus {

		#size-cells = <0>;

		#address-cells = <1>;



		CPU0: cpu@0 {

			device_type = "cpu";

			compatible = "qcom,krait";

			reg = <0x0>;

		};



		CPU1: cpu@1 {

			device_type = "cpu";

			compatible = "qcom,krait";

			reg = <0x1>;

		};



		CPU2: cpu@2 {

			device_type = "cpu";

			compatible = "qcom,krait";

			reg = <0x2>;

		};



		CPU3: cpu@3 {

			device_type = "cpu";

			compatible = "qcom,krait";

			reg = <0x3>;

		};

	};



	soc: soc { };



	memory {

arch/arm/boot/dts/qcom/mdm9630.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -24,6 +24,17 @@ 
		sdhc2 = &sdhc_2; /* SDC2 SD card slot */

	};



	cpus {

		#size-cells = <0>;

		#address-cells = <1>;



		CPU0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x0>;

		};

	};



	memory {

		audio_mem: audio_region@0 {

			linux,reserve-contiguous-region;

arch/arm/boot/dts/qcom/msm8226.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -24,6 +24,35 @@ 
		sdhc3 = &sdhc_3; /* SDC3 SDIO slot */

	};



	cpus {

		#size-cells = <0>;

		#address-cells = <1>;



		CPU0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x0>;

		};



		CPU1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x1>;

		};



		CPU2: cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x2>;

		};



		CPU3: cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x3>;

		};

	};



	soc: soc { };

};

arch/arm/boot/dts/qcom/msm8610.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -63,6 +63,35 @@ 
		spi4 = &spi_4;

	};



	cpus {

		#size-cells = <0>;

		#address-cells = <1>;



		CPU0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x0>;

		};



		CPU1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x1>;

		};



		CPU2: cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x2>;

		};



		CPU3: cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x3>;

		};

	};



	soc: soc { };

};

arch/arm/boot/dts/qcom/msmzirc.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -23,6 +23,17 @@ 
		spi0 = &spi_0;

	};



	cpus {

		#size-cells = <0>;

		#address-cells = <1>;



		CPU0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a7";

			reg = <0x0>;

		};

	};



	soc: soc { };

};