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This project is archived. Its data is read-only.

Commit 15f6afcf authored Sep 10, 2013 by Deva Ramasubramanian

ARM: dts: msm: Specify clocks and regulators for venus



Define each clock and regulator that's used by the venus/vidc
driver.

APQ8084 adds two new power domains, which are regulated by
venus-core0-supply and venus-core1-supply respectively. In
addition, include the "core0_clk" and "core1_clk" so that the
driver can enable it.  Within venus core0 refers to the HEVC
decode core whereas core1 refers to the core for legacy codecs.

Change-Id: Ib99425ad87921007aecbd6af240ccdcafd601104
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>

parent c9887095

arch/arm/boot/dts/apq8084.dtsi

+5 −0

Original line number	Diff line number	Diff line
		@@ -1555,6 +1555,11 @@
		qcom,has-ocmem;
		qcom,max-hw-load = <1281600>; /* Full 4k @ 30 + 1080p @ 30 */
		qcom,vidc-ns-map = <0x40000000 0x40000000>;
		venus-supply = <&gdsc_venus>;
		venus-core0-supply = <&gdsc_venus_core0>;
		venus-core1-supply = <&gdsc_venus_core1>;
		qcom,clock-names= "core_clk", "core0_clk", "core1_clk", "iface_clk", "bus_clk", "mem_clk";
		qcom,clock-configs = <0x3 0x0 0x0 0x0 0x0 0x0>;
		qcom,load-freq-tbl = <979200 465000000>,
		<783360 465000000>,
		<489600 266670000>,

arch/arm/boot/dts/msm8226.dtsi

+3 −1

Original line number	Diff line number	Diff line
		@@ -162,7 +162,9 @@
		compatible = "qcom,msm-vidc";
		reg = <0xfdc00000 0xff000>;
		interrupts = <0 44 0>;
		vdd-supply = <&gdsc_venus>;
		venus-supply = <&gdsc_venus>;
		qcom,clock-names = "core_clk", "iface_clk", "bus_clk";
		qcom,clock-configs = <0x3 0x0 0x0>;
		qcom,load-freq-tbl = <352800 160000000>,
		<244800 133330000>,
		<108000 66700000>;

arch/arm/boot/dts/msm8974.dtsi

+3 −1

Original line number	Diff line number	Diff line
		@@ -214,10 +214,12 @@
		compatible = "qcom,msm-vidc";
		reg = <0xfdc00000 0xff000>;
		interrupts = <0 44 0>;
		vdd-supply = <&gdsc_venus>;
		venus-supply = <&gdsc_venus>;
		qcom,hfi = "venus";
		qcom,has-ocmem;
		qcom,max-hw-load = <1224450>; /* 4k @ 30 + 1080p @ 30*/
		qcom,clock-names = "core_clk", "iface_clk", "bus_clk", "mem_clk";
		qcom,clock-configs = <0x3 0x0 0x0 0x0>;
		};

		qcom,vidc {