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Commit 14357783 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add coresight dt nodes for remote processors for msm8909"

parents 8872060e c4380b47

arch/arm/boot/dts/qcom/msm8909-coresight.dtsi

+91 −26
Original line number Diff line number Diff line
@@ -82,12 +82,44 @@ 
		clock-names = "core_clk", "core_a_clk";

	};



	funnel_in2: funnel@869000 {

		compatible = "arm,coresight-funnel";

		reg = <0x869000 0x1000>;

		reg-names = "funnel-base";



		coresight-id = <4>;

		coresight-name = "coresight-funnel-in2";

		coresight-nr-inports = <8>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in0>;

		coresight-child-ports = <6>;

		clocks = <&clock_rpm clk_qdss_clk>,

			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

	};



	funnel_in3: funnel@868000 {

		compatible = "arm,coresight-funnel";

		reg = <0x868000 0x1000>;

		reg-names = "funnel-base";



		coresight-id = <5>;

		coresight-name = "coresight-funnel-in3";

		coresight-nr-inports = <2>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in2>;

		coresight-child-ports = <7>;

		clocks = <&clock_rpm clk_qdss_clk>,

			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

	};



	cti0: cti@810000 {

		compatible = "arm,coresight-cti";

		reg = <0x810000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <4>;

		coresight-id = <6>;

		coresight-name = "coresight-cti0";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -100,7 +132,7 @@ 
		reg = <0x811000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <5>;

		coresight-id = <7>;

		coresight-name = "coresight-cti1";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -113,7 +145,7 @@ 
		reg = <0x812000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <6>;

		coresight-id = <8>;

		coresight-name = "coresight-cti2";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -126,7 +158,7 @@ 
		reg = <0x813000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <7>;

		coresight-id = <9>;

		coresight-name = "coresight-cti3";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -139,7 +171,7 @@ 
		reg = <0x814000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <8>;

		coresight-id = <10>;

		coresight-name = "coresight-cti4";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -152,7 +184,7 @@ 
		reg = <0x815000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <9>;

		coresight-id = <11>;

		coresight-name = "coresight-cti5";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -165,7 +197,7 @@ 
		reg = <0x816000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <10>;

		coresight-id = <12>;

		coresight-name = "coresight-cti6";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -178,7 +210,7 @@ 
		reg = <0x817000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <11>;

		coresight-id = <13>;

		coresight-name = "coresight-cti7";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -191,7 +223,7 @@ 
		reg = <0x818000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <12>;

		coresight-id = <14>;

		coresight-name = "coresight-cti8";

		coresight-nr-inports = <0>;

		clocks = <&clock_rpm clk_qdss_clk>,
@@ -204,7 +236,7 @@ 
		reg = <0x851000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <13>;

		coresight-id = <15>;

		coresight-name = "coresight-cti-cpu0";

		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU0>;
@@ -221,7 +253,7 @@ 
		reg = <0x852000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <14>;

		coresight-id = <16>;

		coresight-name = "coresight-cti-cpu1";

		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU1>;
@@ -238,7 +270,7 @@ 
		reg = <0x853000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <15>;

		coresight-id = <17>;

		coresight-name = "coresight-cti-cpu2";

		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU2>;
@@ -255,7 +287,7 @@ 
		reg = <0x854000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <16>;

		coresight-id = <18>;

		coresight-name = "coresight-cti-cpu3";

		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU3>;
@@ -272,7 +304,7 @@ 
		reg = <0x83c000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <17>;

		coresight-id = <19>;

		coresight-name = "coresight-cti-rpm-cpu0";

		coresight-nr-inports = <0>;
@@ -286,7 +318,7 @@ 
		reg = <0x838000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <18>;

		coresight-id = <20>;

		coresight-name = "coresight-cti-modem-cpu0";

		coresight-nr-inports = <0>;
@@ -300,7 +332,7 @@ 
		reg = <0x835000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <19>;

		coresight-id = <21>;

		coresight-name = "coresight-cti-wcn-cpu0";

		coresight-nr-inports = <0>;
@@ -314,7 +346,7 @@ 
		reg = <0x830000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <20>;

		coresight-id = <22>;

		coresight-name = "coresight-cti-video-cpu0";

		coresight-nr-inports = <0>;
@@ -329,7 +361,7 @@ 
		      <0x9280000 0x180000>;

		reg-names = "stm-base", "stm-data-base";



		coresight-id = <21>;

		coresight-id = <23>;

		coresight-name = "coresight-stm";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;
@@ -345,7 +377,7 @@ 
		reg = <0x801000 0x1000>;

		reg-names = "csr-base";



		coresight-id = <22>;

		coresight-id = <24>;

		coresight-name = "coresight-csr";

		coresight-nr-inports = <0>;
@@ -360,7 +392,7 @@ 
		reg = <0x855000 0x1000>;

		reg-names = "funnel-base";



		coresight-id = <23>;

		coresight-id = <25>;

		coresight-name = "coresight-funnel-apss";

		coresight-nr-inports = <4>;

		coresight-outports = <0>;
@@ -377,7 +409,7 @@ 
		reg = <0x84c000 0x1000>;

		reg-names = "etm-base";



		coresight-id = <24>;

		coresight-id = <26>;

		coresight-name = "coresight-etm0";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;
@@ -395,7 +427,7 @@ 
		reg = <0x84d000 0x1000>;

		reg-names = "etm-base";



		coresight-id = <25>;

		coresight-id = <27>;

		coresight-name = "coresight-etm1";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;
@@ -413,7 +445,7 @@ 
		reg = <0x84e000 0x1000>;

		reg-names = "etm-base";



		coresight-id = <26>;

		coresight-id = <28>;

		coresight-name = "coresight-etm2";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;
@@ -431,7 +463,7 @@ 
		reg = <0x84f000 0x1000>;

		reg-names = "etm-base";



		coresight-id = <27>;

		coresight-id = <29>;

		coresight-name = "coresight-etm3";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;
@@ -453,7 +485,7 @@ 
		      <0x801020 0x10>;

		reg-names = "wrapper-mux", "wrapper-lockaccess", "usbbam-mux",

		            "blsp-mux", "apb-mux";

		coresight-id = <28>;

		coresight-id = <30>;

		coresight-name = "coresight-hwevent";

		coresight-nr-inports = <0>;
@@ -462,12 +494,45 @@ 
		clock-names = "core_clk", "core_a_clk";

	};



	rpm_etm0 {

		compatible = "qcom,coresight-rpm-etm";



		coresight-id = <31>;

		coresight-name = "coresight-rpm-etm0";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in0>;

		coresight-child-ports = <0>;

	};



	wcn_etm0 {

		compatible = "qcom,coresight-wcn-etm";



		coresight-id = <32>;

		coresight-name = "coresight-wcn-etm0";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in3>;

		coresight-child-ports = <0>;

	};



	modem_etm0 {

		compatible = "qcom,coresight-modem-etm";



		coresight-id = <33>;

		coresight-name = "coresight-modem-etm0";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in0>;

		coresight-child-ports = <2>;

	};



	fuse: fuse@5e01c {

		compatible = "arm,coresight-fuse-v2";

		reg = <0x5e01c 0x8>;

		reg-names = "fuse-base";



		coresight-id = <29>;

		coresight-id = <34>;

		coresight-name = "coresight-fuse";

		coresight-nr-inports = <0>;

	};