Merge "msm: clock-krypton: Add LDOs for pcie and usb" (13d2d953) · Commits · e / devices / android_kernel_sony_msm8994

arch/arm/mach-msm/clock-krypton.c

+28 −2

Original line number	Diff line number	Diff line
		@@ -245,6 +245,8 @@ static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL);
		#define PCIE_AXI_MSTR_CBCR (0x1C2C)
		#define PCIE_PIPE_CMD_RCGR (0x1C14)
		#define PCIE_AUX_CMD_RCGR (0x1E00)
		#define PCIE_GPIO_LDO_EN (0x1E40)
		#define USB_SS_LDO_EN (0x1E44)
		#define Q6SS_AHB_LFABIF_CBCR (0x22000)
		#define Q6SS_AHBM_CBCR (0x22004)

		@@ -885,6 +887,17 @@ DEFINE_CLK_RPM_SMD(bimc_clk, bimc_a_clk, RPM_MEM_CLK_TYPE, BIMC_ID, NULL);

		DEFINE_CLK_RPM_SMD(cnoc_clk, cnoc_a_clk, RPM_BUS_CLK_TYPE, CNOC_ID, NULL);

		static struct gate_clk gcc_pcie_gpio_ldo = {
		.en_reg = PCIE_GPIO_LDO_EN,
		.en_mask = BIT(0),
		.base = &virt_bases[GCC_BASE],
		.c = {
		.dbg_name = "gcc_pcie_gpio_ldo",
		.ops = &clk_ops_gate,
		CLK_INIT(gcc_pcie_gpio_ldo.c),
		},
		};

		static struct reset_clk gcc_usb3_phy_com_reset = {
		.reset_reg = USB3_PHY_COM_BCR,
		.base = &virt_bases[GCC_BASE],
		@@ -905,6 +918,17 @@ static struct reset_clk gcc_usb3_phy_reset = {
		},
		};

		static struct gate_clk gcc_usb_ss_ldo = {
		.en_reg = USB_SS_LDO_EN,
		.en_mask = BIT(0),
		.base = &virt_bases[GCC_BASE],
		.c = {
		.dbg_name = "gcc_usb_ss_ldo",
		.ops = &clk_ops_gate,
		CLK_INIT(gcc_usb_ss_ldo.c),
		},
		};

		DEFINE_CLK_RPM_SMD(ipa_clk, ipa_a_clk, RPM_IPA_CLK_TYPE, IPA_ID, NULL);

		DEFINE_CLK_RPM_SMD(pnoc_clk, pnoc_a_clk, RPM_BUS_CLK_TYPE, PNOC_ID, NULL);
		@@ -2051,6 +2075,8 @@ static struct clk_lookup msm_clocks_krypton[] = {
		CLK_LOOKUP("", ce1_clk_src.c, ""),
		CLK_LOOKUP("", gcc_usb3_phy_com_reset.c, ""),
		CLK_LOOKUP("", gcc_usb3_phy_reset.c, ""),
		CLK_LOOKUP("", gcc_pcie_gpio_ldo.c, ""),
		CLK_LOOKUP("", gcc_usb_ss_ldo.c, ""),
		};

		static void __init reg_init(void)