Commit 12f030ed authored Jun 03, 2014 by Stepan Moskovchenko

EDAC: arm64: Fix CPUMERRSR_EL1 truncation



CPUMERRSR_EL1 is a 64-bit register, so we must use a 64-bit
data type to hold its value.

Change-Id: I6bb7e41d84f417eb39e62cffef0807098205d268
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>

parent f9e5104e

drivers/edac/cortex_arm64_edac.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -122,7 +122,7 @@ static const struct errors_edac errors[] = {
		})

		#define read_cpumerrsr_el1 ({ \
		u32 __val; \
		u64 __val; \
		asm("mrs %0, s3_1_c15_c2_2" : "=r" (__val)); \
		__val; \
		})