Commit 0f5e49a2 authored Dec 06, 2007 by Manuel Lauss Committed by Ralf Baechle Dec 09, 2007

[MIPS] Alchemy: Fix Au1x SD controller IRQ



With the introduction of MIPS_CPU_IRQ_BASE, the hardcoded IRQ number of
the au1100/au1200 SD controller(s) is no longer valid.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 6d2d419f

include/asm-mips/mach-au1x00/au1100_mmc.h

+5 −2

Original line number	Diff line number	Diff line
		@@ -41,8 +41,11 @@

		#define NUM_AU1100_MMC_CONTROLLERS 2


		#define AU1100_SD_IRQ 2
		#if defined(CONFIG_SOC_AU1100)
		#define AU1100_SD_IRQ AU1100_SD_INT
		#elif defined(CONFIG_SOC_AU1200)
		#define AU1100_SD_IRQ AU1200_SD_INT
		#endif


		#define SD0_BASE 0xB0600000