Merge "ARM: dts: msm: Add a PCIe node for krypton"

		interrupts = <0 94 0>;

	};

	pcie0: qcom,pcie@fc520000 {

		compatible = "qcom,msm_pcie";

		cell-index = <0>;

		qcom,ctrl-amt = <1>;

		reg = <0xfc520000 0x2000>,

		      <0xfc526000 0x1000>,

		      <0x80000000 0x1000>,

		      <0x80001000 0x1000>,

		      <0x80100000 0x1000>,

		      <0x80200000 0xe00000>;

		reg-names = "parf", "phy", "dm_core", "elbi",

				"conf", "bars";

		#address-cells = <0>;

		interrupt-parent = <&pcie0>;

		interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 41 0

				1 &intc 0 42 0

				2 &intc 0 43 0

				3 &intc 0 44 0

				4 &intc 0 45 0

				5 &intc 0 46 0

				6 &intc 0 47 0

				7 &intc 0 48 0

				8 &intc 0 49 0

				9 &intc 0 50 0

				10 &intc 0 51 0

				11 &intc 0 52 0

				12 &msmgpio 69 0x2>;

		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",

				"int_aer_legacy", "int_pls_link_up",

				"int_pls_link_down", "int_bridge_flush_n",

				"int_wake";

		perst-gpio = <&msmgpio 61 0>;

		wake-gpio = <&msmgpio 65 0>;

		clkreq-gpio = <&msmgpio 64 0>;

		gdsc_vdd-supply = <&gdsc_pcie_0>;

		vreg-1.8-supply = <&pmd9635_l8>;

		vreg-0.9-supply = <&pmd9635_l4>;

		qcom,vreg-1.8-voltage-level = <1800000 1800000 1000>;

		qcom,vreg-0.9-voltage-level = <950000 950000 24000>;

		clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src",

				"pcie_0_aux_clk", "pcie_0_cfg_ahb_clk",

				"pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk",

				"pcie_0_ldo";

		max-clock-frequency-hz = <125000000>, <0>, <1000000>,

						<0>, <0>, <0>, <0>;

	};

	i2c_1: i2c@f9925000 { /* BLSP1 QUP3 */

		cell-index = <1>;

		compatible = "qcom,i2c-qup";