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Commit 0e09a785 authored by Prasad Sodagudi's avatar Prasad Sodagudi Committed by Vignesh Radhakrishnan
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clocksource: arch_timer: Use _no_log variants while accessing registers 



arch_timer register accesses happen more frequently flooding the
RTB logs. Since they are not that useful for debugging purposes,
use _no_log variants while accessing those registers.

Change-Id: Ide35ef1a01e4792c1b3b7b7be7ad3f069dc2f694
Signed-off-by: default avatarPrasad Sodagudi <psodagud@codeaurora.org>
parent 8429a262

drivers/clocksource/arm_arch_timer.c

+17 −16
Original line number Diff line number Diff line
@@ -81,10 +81,10 @@ static inline void arch_timer_reg_write(int access, int reg, u32 val, 
		struct arch_timer *timer = to_arch_timer(clk);

		switch (reg) {

		case ARCH_TIMER_REG_CTRL:

			writel_relaxed(val, timer->base + CNTP_CTL);

			writel_relaxed_no_log(val, timer->base + CNTP_CTL);

			break;

		case ARCH_TIMER_REG_TVAL:

			writel_relaxed(val, timer->base + CNTP_TVAL);

			writel_relaxed_no_log(val, timer->base + CNTP_TVAL);

			break;

		default:

			BUILD_BUG();
@@ -93,10 +93,10 @@ static inline void arch_timer_reg_write(int access, int reg, u32 val, 
		struct arch_timer *timer = to_arch_timer(clk);

		switch (reg) {

		case ARCH_TIMER_REG_CTRL:

			writel_relaxed(val, timer->base + CNTV_CTL);

			writel_relaxed_no_log(val, timer->base + CNTV_CTL);

			break;

		case ARCH_TIMER_REG_TVAL:

			writel_relaxed(val, timer->base + CNTV_TVAL);

			writel_relaxed_no_log(val, timer->base + CNTV_TVAL);

			break;

		default:

			BUILD_BUG();
@@ -115,10 +115,10 @@ static inline u32 arch_timer_reg_read(int access, int reg, 
		struct arch_timer *timer = to_arch_timer(clk);

		switch (reg) {

		case ARCH_TIMER_REG_CTRL:

			val = readl_relaxed(timer->base + CNTP_CTL);

			val = readl_relaxed_no_log(timer->base + CNTP_CTL);

			break;

		case ARCH_TIMER_REG_TVAL:

			val = readl_relaxed(timer->base + CNTP_TVAL);

			val = readl_relaxed_no_log(timer->base + CNTP_TVAL);

			break;

		default:

			BUILD_BUG();
@@ -127,10 +127,10 @@ static inline u32 arch_timer_reg_read(int access, int reg, 
		struct arch_timer *timer = to_arch_timer(clk);

		switch (reg) {

		case ARCH_TIMER_REG_CTRL:

			val = readl_relaxed(timer->base + CNTV_CTL);

			val = readl_relaxed_no_log(timer->base + CNTV_CTL);

			break;

		case ARCH_TIMER_REG_TVAL:

			val = readl_relaxed(timer->base + CNTV_TVAL);

			val = readl_relaxed_no_log(timer->base + CNTV_TVAL);

			break;

		default:

			BUILD_BUG();
@@ -352,7 +352,8 @@ arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np) 
	/* Try to determine the frequency from the device tree or CNTFRQ */

	if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {

		if (cntbase)

			arch_timer_rate = readl_relaxed(cntbase + CNTFRQ);

			arch_timer_rate = readl_relaxed_no_log(cntbase

								+ CNTFRQ);

		else

			arch_timer_rate = arch_timer_get_cntfrq();

	}
@@ -389,9 +390,9 @@ static u64 arch_counter_get_cntpct_mem(void) 
	u32 pct_lo, pct_hi, tmp_hi;



	do {

		pct_hi = readl_relaxed(arch_counter_base + CNTPCT_HI);

		pct_lo = readl_relaxed(arch_counter_base + CNTPCT_LO);

		tmp_hi = readl_relaxed(arch_counter_base + CNTPCT_HI);

		pct_hi = readl_relaxed_no_log(arch_counter_base + CNTPCT_HI);

		pct_lo = readl_relaxed_no_log(arch_counter_base + CNTPCT_LO);

		tmp_hi = readl_relaxed_no_log(arch_counter_base + CNTPCT_HI);

	} while (pct_hi != tmp_hi);



	return ((u64) pct_hi << 32) | pct_lo;
@@ -402,9 +403,9 @@ static notrace u64 arch_counter_get_cntvct_mem(void) 
	u32 vct_lo, vct_hi, tmp_hi;



	do {

		vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);

		vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO);

		tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);

		vct_hi = readl_relaxed_no_log(arch_counter_base + CNTVCT_HI);

		vct_lo = readl_relaxed_no_log(arch_counter_base + CNTVCT_LO);

		tmp_hi = readl_relaxed_no_log(arch_counter_base + CNTVCT_HI);

	} while (vct_hi != tmp_hi);



	return ((u64) vct_hi << 32) | vct_lo;
@@ -726,7 +727,7 @@ static void __init arch_timer_mem_init(struct device_node *np) 
		return;

	}



	cnttidr = readl_relaxed(cntctlbase + CNTTIDR);

	cnttidr = readl_relaxed_no_log(cntctlbase + CNTTIDR);

	iounmap(cntctlbase);



	/*