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Commit 0d3fe190 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: Add reset clocks and rpm clocks for USB for MSM8909"

parents c5db2722 0f5f2ff9

drivers/clk/qcom/clock-gcc-ferrum.c

+26 −0
Original line number Diff line number Diff line
@@ -70,6 +70,8 @@ static void __iomem *virt_bases[N_BASES]; 
#define USB_HS_SYSTEM_CMD_RCGR				0x41010

#define USB2A_PHY_SLEEP_CBCR				0x4102C

#define USB_HS_PHY_CFG_AHB_CBCR				0x41030

#define USB2_HS_PHY_ONLY_BCR				0x41034

#define QUSB2_PHY_BCR					0x4103C

#define SDCC1_APPS_CMD_RCGR				0x42004

#define SDCC1_APPS_CBCR					0x42018

#define SDCC1_AHB_CBCR					0x4201C
@@ -1921,6 +1923,26 @@ static struct branch_clk gcc_usb_hs_system_clk = { 
	},

};



static struct reset_clk gcc_usb2_hs_phy_only_clk = {

	.reset_reg = USB2_HS_PHY_ONLY_BCR,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_usb2_hs_phy_only_clk",

		.ops = &clk_ops_rst,

		CLK_INIT(gcc_usb2_hs_phy_only_clk.c),

	},

};



static struct reset_clk gcc_qusb2_phy_clk = {

	.reset_reg = QUSB2_PHY_BCR,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_qusb2_phy_clk",

		.ops = &clk_ops_rst,

		CLK_INIT(gcc_qusb2_phy_clk.c),

	},

};



static struct branch_clk gcc_venus0_ahb_clk = {

	.cbcr_reg = VENUS0_AHB_CBCR,

	.has_sibling = 1,
@@ -2225,6 +2247,10 @@ static struct clk_lookup msm_clocks_lookup[] = { 
	CLK_LIST(gcc_crypto_ahb_clk),

	CLK_LIST(gcc_crypto_axi_clk),

	CLK_LIST(crypto_clk_src),



	/* Reset clocks */

	CLK_LIST(gcc_usb2_hs_phy_only_clk),

	CLK_LIST(gcc_qusb2_phy_clk),

};



static int msm_gcc_probe(struct platform_device *pdev)

drivers/clk/qcom/clock-rpm-ferrum.c

+8 −0
Original line number Diff line number Diff line
@@ -87,6 +87,10 @@ static DEFINE_CLK_VOTER(snoc_msmbus_a_clk, &snoc_a_clk.c, LONG_MAX); 
static DEFINE_CLK_VOTER(bimc_msmbus_a_clk,  &bimc_a_clk.c,  LONG_MAX);

static DEFINE_CLK_VOTER(pcnoc_keepalive_a_clk, &pcnoc_a_clk.c, LONG_MAX);



static DEFINE_CLK_VOTER(pcnoc_usb_a_clk, &pcnoc_a_clk.c,  LONG_MAX);

static DEFINE_CLK_VOTER(snoc_usb_a_clk,  &snoc_a_clk.c,  LONG_MAX);

static DEFINE_CLK_VOTER(bimc_usb_a_clk,  &bimc_a_clk.c,  LONG_MAX);



/* Branch Voter clocks */

static DEFINE_CLK_BRANCH_VOTER(xo_gcc, &xo_clk_src.c);

static DEFINE_CLK_BRANCH_VOTER(xo_otg_clk, &xo_clk_src.c);
@@ -138,6 +142,10 @@ static struct clk_lookup msm_clocks_rpm[] = { 
	CLK_LIST(bimc_msmbus_a_clk),

	CLK_LIST(pcnoc_keepalive_a_clk),



	CLK_LIST(pcnoc_usb_a_clk),

	CLK_LIST(snoc_usb_a_clk),

	CLK_LIST(bimc_usb_a_clk),



	/* CoreSight clocks */

	CLK_LIST(qdss_clk),

	CLK_LIST(qdss_a_clk),

include/dt-bindings/clock/msm-clocks-ferrum.h

+5 −0
Original line number Diff line number Diff line
@@ -63,6 +63,8 @@ 
#define clk_sdcc1_apps_clk_src			0xd4975db2

#define clk_sdcc2_apps_clk_src			0xfc46c821

#define clk_usb_hs_system_clk_src		0x28385546

#define clk_gcc_qusb2_phy_clk			0x996884d5

#define clk_gcc_usb2_hs_phy_only_clk		0x0047179d

#define clk_vsync_clk_src			0xecb43940

#define clk_vfe0_clk_src			0xa0c2bd8f

#define clk_vcodec0_clk_src			0xbc193019
@@ -171,17 +173,20 @@ 
#define clk_pcnoc_msmbus_clk			0x2b53b688

#define clk_pcnoc_msmbus_a_clk			0x9753a54f

#define clk_pcnoc_keepalive_a_clk		0x9464f720

#define clk_pcnoc_usb_a_clk			0x11d6a74e

#define clk_snoc_clk				0x2c341aa0

#define clk_snoc_a_clk				0x8fcef2af

#define clk_snoc_msmbus_clk			0xe6900bb6

#define clk_snoc_msmbus_a_clk			0x5d4683bd

#define clk_snoc_mmnoc_axi_clk			0xfedd4bd5

#define clk_snoc_mmnoc_ahb_clk			0xd2149dbb

#define clk_snoc_usb_a_clk			0x34b7821b

#define clk_bimc_clk				0x4b80bf00

#define clk_bimc_a_clk				0x4b25668a

#define clk_bimc_acpu_a_clk			0x4446311b

#define clk_bimc_msmbus_clk			0xd212feea

#define clk_bimc_msmbus_a_clk			0x71d1a499

#define clk_bimc_usb_a_clk			0xea410834

#define clk_qdss_clk				0x1492202a

#define clk_qdss_a_clk				0xdd121669

#define clk_xo_clk_src				0x23f5649f