serial: delete last unused traces of pausing I/O in 8250 (0acf519f) · Commits · e / devices / android_kernel_sony_msm8994

drivers/tty/serial/8250/8250.c

+150 −158

Original line number	Original line	Diff line number	Diff line
	@@ -486,26 +486,18 @@ serial_out_sync(struct uart_8250_port *up, int offset, int value)
	(up->port.serial_in(&(up)->port, (offset)))		(up->port.serial_in(&(up)->port, (offset)))
	#define serial_out(up, offset, value) \		#define serial_out(up, offset, value) \
	(up->port.serial_out(&(up)->port, (offset), (value)))		(up->port.serial_out(&(up)->port, (offset), (value)))
	/*
	* We used to support using pause I/O for certain machines. We
	* haven't supported this for a while, but just in case it's badly
	* needed for certain old 386 machines, I've left these #define's
	* in....
	*/
	#define serial_inp(up, offset) serial_in(up, offset)
	#define serial_outp(up, offset, value) serial_out(up, offset, value)

	/* Uart divisor latch read */		/* Uart divisor latch read */
	static inline int _serial_dl_read(struct uart_8250_port *up)		static inline int _serial_dl_read(struct uart_8250_port *up)
	{		{
	return serial_inp(up, UART_DLL) \| serial_inp(up, UART_DLM) << 8;		return serial_in(up, UART_DLL) \| serial_in(up, UART_DLM) << 8;
	}		}

	/* Uart divisor latch write */		/* Uart divisor latch write */
	static inline void _serial_dl_write(struct uart_8250_port *up, int value)		static inline void _serial_dl_write(struct uart_8250_port *up, int value)
	{		{
	serial_outp(up, UART_DLL, value & 0xff);		serial_out(up, UART_DLL, value & 0xff);
	serial_outp(up, UART_DLM, value >> 8 & 0xff);		serial_out(up, UART_DLM, value >> 8 & 0xff);
	}		}

	#if defined(CONFIG_MIPS_ALCHEMY)		#if defined(CONFIG_MIPS_ALCHEMY)
	@@ -575,10 +567,10 @@ static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
	static void serial8250_clear_fifos(struct uart_8250_port *p)		static void serial8250_clear_fifos(struct uart_8250_port *p)
	{		{
	if (p->capabilities & UART_CAP_FIFO) {		if (p->capabilities & UART_CAP_FIFO) {
	serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);		serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
	serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO \|		serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO \|
	UART_FCR_CLEAR_RCVR \| UART_FCR_CLEAR_XMIT);		UART_FCR_CLEAR_RCVR \| UART_FCR_CLEAR_XMIT);
	serial_outp(p, UART_FCR, 0);		serial_out(p, UART_FCR, 0);
	}		}
	}		}

	@@ -591,15 +583,15 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
	{		{
	if (p->capabilities & UART_CAP_SLEEP) {		if (p->capabilities & UART_CAP_SLEEP) {
	if (p->capabilities & UART_CAP_EFR) {		if (p->capabilities & UART_CAP_EFR) {
	serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
	serial_outp(p, UART_EFR, UART_EFR_ECB);		serial_out(p, UART_EFR, UART_EFR_ECB);
	serial_outp(p, UART_LCR, 0);		serial_out(p, UART_LCR, 0);
	}		}
	serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);		serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
	if (p->capabilities & UART_CAP_EFR) {		if (p->capabilities & UART_CAP_EFR) {
	serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
	serial_outp(p, UART_EFR, 0);		serial_out(p, UART_EFR, 0);
	serial_outp(p, UART_LCR, 0);		serial_out(p, UART_LCR, 0);
	}		}
	}		}
	}		}
	@@ -614,12 +606,12 @@ static int __enable_rsa(struct uart_8250_port *up)
	unsigned char mode;		unsigned char mode;
	int result;		int result;

	mode = serial_inp(up, UART_RSA_MSR);		mode = serial_in(up, UART_RSA_MSR);
	result = mode & UART_RSA_MSR_FIFO;		result = mode & UART_RSA_MSR_FIFO;

	if (!result) {		if (!result) {
	serial_outp(up, UART_RSA_MSR, mode \| UART_RSA_MSR_FIFO);		serial_out(up, UART_RSA_MSR, mode \| UART_RSA_MSR_FIFO);
	mode = serial_inp(up, UART_RSA_MSR);		mode = serial_in(up, UART_RSA_MSR);
	result = mode & UART_RSA_MSR_FIFO;		result = mode & UART_RSA_MSR_FIFO;
	}		}

	@@ -638,7 +630,7 @@ static void enable_rsa(struct uart_8250_port *up)
	spin_unlock_irq(&up->port.lock);		spin_unlock_irq(&up->port.lock);
	}		}
	if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)		if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
	serial_outp(up, UART_RSA_FRR, 0);		serial_out(up, UART_RSA_FRR, 0);
	}		}
	}		}

	@@ -657,12 +649,12 @@ static void disable_rsa(struct uart_8250_port *up)
	up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {		up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
	spin_lock_irq(&up->port.lock);		spin_lock_irq(&up->port.lock);

	mode = serial_inp(up, UART_RSA_MSR);		mode = serial_in(up, UART_RSA_MSR);
	result = !(mode & UART_RSA_MSR_FIFO);		result = !(mode & UART_RSA_MSR_FIFO);

	if (!result) {		if (!result) {
	serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);		serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
	mode = serial_inp(up, UART_RSA_MSR);		mode = serial_in(up, UART_RSA_MSR);
	result = !(mode & UART_RSA_MSR_FIFO);		result = !(mode & UART_RSA_MSR_FIFO);
	}		}

	@@ -683,28 +675,28 @@ static int size_fifo(struct uart_8250_port *up)
	unsigned short old_dl;		unsigned short old_dl;
	int count;		int count;

	old_lcr = serial_inp(up, UART_LCR);		old_lcr = serial_in(up, UART_LCR);
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	old_fcr = serial_inp(up, UART_FCR);		old_fcr = serial_in(up, UART_FCR);
	old_mcr = serial_inp(up, UART_MCR);		old_mcr = serial_in(up, UART_MCR);
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO \|		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO \|
	UART_FCR_CLEAR_RCVR \| UART_FCR_CLEAR_XMIT);		UART_FCR_CLEAR_RCVR \| UART_FCR_CLEAR_XMIT);
	serial_outp(up, UART_MCR, UART_MCR_LOOP);		serial_out(up, UART_MCR, UART_MCR_LOOP);
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
	old_dl = serial_dl_read(up);		old_dl = serial_dl_read(up);
	serial_dl_write(up, 0x0001);		serial_dl_write(up, 0x0001);
	serial_outp(up, UART_LCR, 0x03);		serial_out(up, UART_LCR, 0x03);
	for (count = 0; count < 256; count++)		for (count = 0; count < 256; count++)
	serial_outp(up, UART_TX, count);		serial_out(up, UART_TX, count);
	mdelay(20);/* FIXME - schedule_timeout */		mdelay(20);/* FIXME - schedule_timeout */
	for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&		for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
	(count < 256); count++)		(count < 256); count++)
	serial_inp(up, UART_RX);		serial_in(up, UART_RX);
	serial_outp(up, UART_FCR, old_fcr);		serial_out(up, UART_FCR, old_fcr);
	serial_outp(up, UART_MCR, old_mcr);		serial_out(up, UART_MCR, old_mcr);
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
	serial_dl_write(up, old_dl);		serial_dl_write(up, old_dl);
	serial_outp(up, UART_LCR, old_lcr);		serial_out(up, UART_LCR, old_lcr);

	return count;		return count;
	}		}
	@@ -719,20 +711,20 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
	unsigned char old_dll, old_dlm, old_lcr;		unsigned char old_dll, old_dlm, old_lcr;
	unsigned int id;		unsigned int id;

	old_lcr = serial_inp(p, UART_LCR);		old_lcr = serial_in(p, UART_LCR);
	serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A);		serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);

	old_dll = serial_inp(p, UART_DLL);		old_dll = serial_in(p, UART_DLL);
	old_dlm = serial_inp(p, UART_DLM);		old_dlm = serial_in(p, UART_DLM);

	serial_outp(p, UART_DLL, 0);		serial_out(p, UART_DLL, 0);
	serial_outp(p, UART_DLM, 0);		serial_out(p, UART_DLM, 0);

	id = serial_inp(p, UART_DLL) \| serial_inp(p, UART_DLM) << 8;		id = serial_in(p, UART_DLL) \| serial_in(p, UART_DLM) << 8;

	serial_outp(p, UART_DLL, old_dll);		serial_out(p, UART_DLL, old_dll);
	serial_outp(p, UART_DLM, old_dlm);		serial_out(p, UART_DLM, old_dlm);
	serial_outp(p, UART_LCR, old_lcr);		serial_out(p, UART_LCR, old_lcr);

	return id;		return id;
	}		}
	@@ -842,11 +834,11 @@ static void autoconfig_8250(struct uart_8250_port *up)
	up->port.type = PORT_8250;		up->port.type = PORT_8250;

	scratch = serial_in(up, UART_SCR);		scratch = serial_in(up, UART_SCR);
	serial_outp(up, UART_SCR, 0xa5);		serial_out(up, UART_SCR, 0xa5);
	status1 = serial_in(up, UART_SCR);		status1 = serial_in(up, UART_SCR);
	serial_outp(up, UART_SCR, 0x5a);		serial_out(up, UART_SCR, 0x5a);
	status2 = serial_in(up, UART_SCR);		status2 = serial_in(up, UART_SCR);
	serial_outp(up, UART_SCR, scratch);		serial_out(up, UART_SCR, scratch);

	if (status1 == 0xa5 && status2 == 0x5a)		if (status1 == 0xa5 && status2 == 0x5a)
	up->port.type = PORT_16450;		up->port.type = PORT_16450;
	@@ -877,7 +869,7 @@ static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
	} else {		} else {
	status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
	status \|= 0x10; /* 1.625 divisor for baud_base --> 921600 */		status \|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
	serial_outp(up, 0x04, status);		serial_out(up, 0x04, status);
	}		}
	return 1;		return 1;
	}		}
	@@ -900,9 +892,9 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	* Check for presence of the EFR when DLAB is set.		* Check for presence of the EFR when DLAB is set.
	* Only ST16C650V1 UARTs pass this test.		* Only ST16C650V1 UARTs pass this test.
	*/		*/
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
	if (serial_in(up, UART_EFR) == 0) {		if (serial_in(up, UART_EFR) == 0) {
	serial_outp(up, UART_EFR, 0xA8);		serial_out(up, UART_EFR, 0xA8);
	if (serial_in(up, UART_EFR) != 0) {		if (serial_in(up, UART_EFR) != 0) {
	DEBUG_AUTOCONF("EFRv1 ");		DEBUG_AUTOCONF("EFRv1 ");
	up->port.type = PORT_16650;		up->port.type = PORT_16650;
	@@ -910,7 +902,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	} else {		} else {
	DEBUG_AUTOCONF("Motorola 8xxx DUART ");		DEBUG_AUTOCONF("Motorola 8xxx DUART ");
	}		}
	serial_outp(up, UART_EFR, 0);		serial_out(up, UART_EFR, 0);
	return;		return;
	}		}

	@@ -918,7 +910,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	* Maybe it requires 0xbf to be written to the LCR.		* Maybe it requires 0xbf to be written to the LCR.
	* (other ST16C650V2 UARTs, TI16C752A, etc)		* (other ST16C650V2 UARTs, TI16C752A, etc)
	*/		*/
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
	if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {		if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
	DEBUG_AUTOCONF("EFRv2 ");		DEBUG_AUTOCONF("EFRv2 ");
	autoconfig_has_efr(up);		autoconfig_has_efr(up);
	@@ -932,23 +924,23 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	* switch back to bank 2, read it from EXCR1 again and check		* switch back to bank 2, read it from EXCR1 again and check
	* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2		* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
	*/		*/
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	status1 = serial_in(up, UART_MCR);		status1 = serial_in(up, UART_MCR);
	serial_outp(up, UART_LCR, 0xE0);		serial_out(up, UART_LCR, 0xE0);
	status2 = serial_in(up, 0x02); /* EXCR1 */		status2 = serial_in(up, 0x02); /* EXCR1 */

	if (!((status2 ^ status1) & UART_MCR_LOOP)) {		if (!((status2 ^ status1) & UART_MCR_LOOP)) {
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);		serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
	serial_outp(up, UART_LCR, 0xE0);		serial_out(up, UART_LCR, 0xE0);
	status2 = serial_in(up, 0x02); /* EXCR1 */		status2 = serial_in(up, 0x02); /* EXCR1 */
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	serial_outp(up, UART_MCR, status1);		serial_out(up, UART_MCR, status1);

	if ((status2 ^ status1) & UART_MCR_LOOP) {		if ((status2 ^ status1) & UART_MCR_LOOP) {
	unsigned short quot;		unsigned short quot;

	serial_outp(up, UART_LCR, 0xE0);		serial_out(up, UART_LCR, 0xE0);

	quot = serial_dl_read(up);		quot = serial_dl_read(up);
	quot <<= 3;		quot <<= 3;
	@@ -956,7 +948,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	if (ns16550a_goto_highspeed(up))		if (ns16550a_goto_highspeed(up))
	serial_dl_write(up, quot);		serial_dl_write(up, quot);

	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);

	up->port.uartclk = 921600*16;		up->port.uartclk = 921600*16;
	up->port.type = PORT_NS16550A;		up->port.type = PORT_NS16550A;
	@@ -971,15 +963,15 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	* Try setting it with and without DLAB set. Cheap clones		* Try setting it with and without DLAB set. Cheap clones
	* set bit 5 without DLAB set.		* set bit 5 without DLAB set.
	*/		*/
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO \| UART_FCR7_64BYTE);		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO \| UART_FCR7_64BYTE);
	status1 = serial_in(up, UART_IIR) >> 5;		status1 = serial_in(up, UART_IIR) >> 5;
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO \| UART_FCR7_64BYTE);		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO \| UART_FCR7_64BYTE);
	status2 = serial_in(up, UART_IIR) >> 5;		status2 = serial_in(up, UART_IIR) >> 5;
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);

	DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);		DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);

	@@ -998,13 +990,13 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	* already a 1 and maybe locked there before we even start start.		* already a 1 and maybe locked there before we even start start.
	*/		*/
	iersave = serial_in(up, UART_IER);		iersave = serial_in(up, UART_IER);
	serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);		serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
	if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {		if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
	/*		/*
	* OK it's in a known zero state, try writing and reading		* OK it's in a known zero state, try writing and reading
	* without disturbing the current state of the other bits.		* without disturbing the current state of the other bits.
	*/		*/
	serial_outp(up, UART_IER, iersave \| UART_IER_UUE);		serial_out(up, UART_IER, iersave \| UART_IER_UUE);
	if (serial_in(up, UART_IER) & UART_IER_UUE) {		if (serial_in(up, UART_IER) & UART_IER_UUE) {
	/*		/*
	* It's an Xscale.		* It's an Xscale.
	@@ -1022,7 +1014,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
	*/		*/
	DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
	}		}
	serial_outp(up, UART_IER, iersave);		serial_out(up, UART_IER, iersave);

	/*		/*
	* Exar uarts have EFR in a weird location		* Exar uarts have EFR in a weird location
	@@ -1084,8 +1076,8 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
	* Note: this is safe as long as MCR bit 4 is clear		* Note: this is safe as long as MCR bit 4 is clear
	* and the device is in "PC" mode.		* and the device is in "PC" mode.
	*/		*/
	scratch = serial_inp(up, UART_IER);		scratch = serial_in(up, UART_IER);
	serial_outp(up, UART_IER, 0);		serial_out(up, UART_IER, 0);
	#ifdef __i386__		#ifdef __i386__
	outb(0xff, 0x080);		outb(0xff, 0x080);
	#endif		#endif
	@@ -1093,13 +1085,13 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
	* Mask out IER[7:4] bits for test as some UARTs (e.g. TL		* Mask out IER[7:4] bits for test as some UARTs (e.g. TL
	* 16C754B) allow only to modify them if an EFR bit is set.		* 16C754B) allow only to modify them if an EFR bit is set.
	*/		*/
	scratch2 = serial_inp(up, UART_IER) & 0x0f;		scratch2 = serial_in(up, UART_IER) & 0x0f;
	serial_outp(up, UART_IER, 0x0F);		serial_out(up, UART_IER, 0x0F);
	#ifdef __i386__		#ifdef __i386__
	outb(0, 0x080);		outb(0, 0x080);
	#endif		#endif
	scratch3 = serial_inp(up, UART_IER) & 0x0f;		scratch3 = serial_in(up, UART_IER) & 0x0f;
	serial_outp(up, UART_IER, scratch);		serial_out(up, UART_IER, scratch);
	if (scratch2 != 0 \|\| scratch3 != 0x0F) {		if (scratch2 != 0 \|\| scratch3 != 0x0F) {
	/*		/*
	* We failed; there's nothing here		* We failed; there's nothing here
	@@ -1123,9 +1115,9 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
	* that conflicts with COM 1-4 --- we hope!		* that conflicts with COM 1-4 --- we hope!
	*/		*/
	if (!(up->port.flags & UPF_SKIP_TEST)) {		if (!(up->port.flags & UPF_SKIP_TEST)) {
	serial_outp(up, UART_MCR, UART_MCR_LOOP \| 0x0A);		serial_out(up, UART_MCR, UART_MCR_LOOP \| 0x0A);
	status1 = serial_inp(up, UART_MSR) & 0xF0;		status1 = serial_in(up, UART_MSR) & 0xF0;
	serial_outp(up, UART_MCR, save_mcr);		serial_out(up, UART_MCR, save_mcr);
	if (status1 != 0x90) {		if (status1 != 0x90) {
	DEBUG_AUTOCONF("LOOP test failed (%02x) ",		DEBUG_AUTOCONF("LOOP test failed (%02x) ",
	status1);		status1);
	@@ -1142,11 +1134,11 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
	* We also initialise the EFR (if any) to zero for later. The		* We also initialise the EFR (if any) to zero for later. The
	* EFR occupies the same register location as the FCR and IIR.		* EFR occupies the same register location as the FCR and IIR.
	*/		*/
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
	serial_outp(up, UART_EFR, 0);		serial_out(up, UART_EFR, 0);
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);

	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
	scratch = serial_in(up, UART_IIR) >> 6;		scratch = serial_in(up, UART_IIR) >> 6;

	DEBUG_AUTOCONF("iir=%d ", scratch);		DEBUG_AUTOCONF("iir=%d ", scratch);
	@@ -1183,7 +1175,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
	}		}
	#endif		#endif

	serial_outp(up, UART_LCR, save_lcr);		serial_out(up, UART_LCR, save_lcr);

	if (up->capabilities != uart_config[up->port.type].flags) {		if (up->capabilities != uart_config[up->port.type].flags) {
	printk(KERN_WARNING		printk(KERN_WARNING
	@@ -1204,15 +1196,15 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
	*/		*/
	#ifdef CONFIG_SERIAL_8250_RSA		#ifdef CONFIG_SERIAL_8250_RSA
	if (up->port.type == PORT_RSA)		if (up->port.type == PORT_RSA)
	serial_outp(up, UART_RSA_FRR, 0);		serial_out(up, UART_RSA_FRR, 0);
	#endif		#endif
	serial_outp(up, UART_MCR, save_mcr);		serial_out(up, UART_MCR, save_mcr);
	serial8250_clear_fifos(up);		serial8250_clear_fifos(up);
	serial_in(up, UART_RX);		serial_in(up, UART_RX);
	if (up->capabilities & UART_CAP_UUE)		if (up->capabilities & UART_CAP_UUE)
	serial_outp(up, UART_IER, UART_IER_UUE);		serial_out(up, UART_IER, UART_IER_UUE);
	else		else
	serial_outp(up, UART_IER, 0);		serial_out(up, UART_IER, 0);

	out:		out:
	spin_unlock_irqrestore(&up->port.lock, flags);		spin_unlock_irqrestore(&up->port.lock, flags);
	@@ -1236,31 +1228,31 @@ static void autoconfig_irq(struct uart_8250_port *up)

	/* forget possible initially masked and pending IRQ */		/* forget possible initially masked and pending IRQ */
	probe_irq_off(probe_irq_on());		probe_irq_off(probe_irq_on());
	save_mcr = serial_inp(up, UART_MCR);		save_mcr = serial_in(up, UART_MCR);
	save_ier = serial_inp(up, UART_IER);		save_ier = serial_in(up, UART_IER);
	serial_outp(up, UART_MCR, UART_MCR_OUT1 \| UART_MCR_OUT2);		serial_out(up, UART_MCR, UART_MCR_OUT1 \| UART_MCR_OUT2);

	irqs = probe_irq_on();		irqs = probe_irq_on();
	serial_outp(up, UART_MCR, 0);		serial_out(up, UART_MCR, 0);
	udelay(10);		udelay(10);
	if (up->port.flags & UPF_FOURPORT) {		if (up->port.flags & UPF_FOURPORT) {
	serial_outp(up, UART_MCR,		serial_out(up, UART_MCR,
	UART_MCR_DTR \| UART_MCR_RTS);		UART_MCR_DTR \| UART_MCR_RTS);
	} else {		} else {
	serial_outp(up, UART_MCR,		serial_out(up, UART_MCR,
	UART_MCR_DTR \| UART_MCR_RTS \| UART_MCR_OUT2);		UART_MCR_DTR \| UART_MCR_RTS \| UART_MCR_OUT2);
	}		}
	serial_outp(up, UART_IER, 0x0f); /* enable all intrs */		serial_out(up, UART_IER, 0x0f); /* enable all intrs */
	(void)serial_inp(up, UART_LSR);		(void)serial_in(up, UART_LSR);
	(void)serial_inp(up, UART_RX);		(void)serial_in(up, UART_RX);
	(void)serial_inp(up, UART_IIR);		(void)serial_in(up, UART_IIR);
	(void)serial_inp(up, UART_MSR);		(void)serial_in(up, UART_MSR);
	serial_outp(up, UART_TX, 0xFF);		serial_out(up, UART_TX, 0xFF);
	udelay(20);		udelay(20);
	irq = probe_irq_off(irqs);		irq = probe_irq_off(irqs);

	serial_outp(up, UART_MCR, save_mcr);		serial_out(up, UART_MCR, save_mcr);
	serial_outp(up, UART_IER, save_ier);		serial_out(up, UART_IER, save_ier);

	if (up->port.flags & UPF_FOURPORT)		if (up->port.flags & UPF_FOURPORT)
	outb_p(save_ICP, ICP);		outb_p(save_ICP, ICP);
	@@ -1380,7 +1372,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)

	do {		do {
	if (likely(lsr & UART_LSR_DR))		if (likely(lsr & UART_LSR_DR))
	ch = serial_inp(up, UART_RX);		ch = serial_in(up, UART_RX);
	else		else
	/*		/*
	* Intel 82571 has a Serial Over Lan device that will		* Intel 82571 has a Serial Over Lan device that will
	@@ -1445,7 +1437,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
	uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);		uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);

	ignore_char:		ignore_char:
	lsr = serial_inp(up, UART_LSR);		lsr = serial_in(up, UART_LSR);
	} while ((lsr & (UART_LSR_DR \| UART_LSR_BI)) && (max_count-- > 0));		} while ((lsr & (UART_LSR_DR \| UART_LSR_BI)) && (max_count-- > 0));
	spin_unlock(&up->port.lock);		spin_unlock(&up->port.lock);
	tty_flip_buffer_push(tty);		tty_flip_buffer_push(tty);
	@@ -1460,7 +1452,7 @@ void serial8250_tx_chars(struct uart_8250_port *up)
	int count;		int count;

	if (up->port.x_char) {		if (up->port.x_char) {
	serial_outp(up, UART_TX, up->port.x_char);		serial_out(up, UART_TX, up->port.x_char);
	up->port.icount.tx++;		up->port.icount.tx++;
	up->port.x_char = 0;		up->port.x_char = 0;
	return;		return;
	@@ -1532,7 +1524,7 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)

	spin_lock_irqsave(&up->port.lock, flags);		spin_lock_irqsave(&up->port.lock, flags);

	status = serial_inp(up, UART_LSR);		status = serial_in(up, UART_LSR);

	DEBUG_INTR("status = %x...", status);		DEBUG_INTR("status = %x...", status);

	@@ -1894,12 +1886,12 @@ static int serial8250_get_poll_char(struct uart_port *port)
	{		{
	struct uart_8250_port *up =		struct uart_8250_port *up =
	container_of(port, struct uart_8250_port, port);		container_of(port, struct uart_8250_port, port);
	unsigned char lsr = serial_inp(up, UART_LSR);		unsigned char lsr = serial_in(up, UART_LSR);

	if (!(lsr & UART_LSR_DR))		if (!(lsr & UART_LSR_DR))
	return NO_POLL_CHAR;		return NO_POLL_CHAR;

	return serial_inp(up, UART_RX);		return serial_in(up, UART_RX);
	}		}


	@@ -1959,14 +1951,14 @@ static int serial8250_startup(struct uart_port *port)
	if (up->port.type == PORT_16C950) {		if (up->port.type == PORT_16C950) {
	/* Wake up and initialize UART */		/* Wake up and initialize UART */
	up->acr = 0;		up->acr = 0;
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
	serial_outp(up, UART_EFR, UART_EFR_ECB);		serial_out(up, UART_EFR, UART_EFR_ECB);
	serial_outp(up, UART_IER, 0);		serial_out(up, UART_IER, 0);
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	serial_icr_write(up, UART_CSR, 0); /* Reset the UART */		serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
	serial_outp(up, UART_EFR, UART_EFR_ECB);		serial_out(up, UART_EFR, UART_EFR_ECB);
	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	}		}

	#ifdef CONFIG_SERIAL_8250_RSA		#ifdef CONFIG_SERIAL_8250_RSA
	@@ -1986,10 +1978,10 @@ static int serial8250_startup(struct uart_port *port)
	/*		/*
	* Clear the interrupt registers.		* Clear the interrupt registers.
	*/		*/
	(void) serial_inp(up, UART_LSR);		(void) serial_in(up, UART_LSR);
	(void) serial_inp(up, UART_RX);		(void) serial_in(up, UART_RX);
	(void) serial_inp(up, UART_IIR);		(void) serial_in(up, UART_IIR);
	(void) serial_inp(up, UART_MSR);		(void) serial_in(up, UART_MSR);

	/*		/*
	* At this point, there's no way the LSR could still be 0xff;		* At this point, there's no way the LSR could still be 0xff;
	@@ -1997,7 +1989,7 @@ static int serial8250_startup(struct uart_port *port)
	* here.		* here.
	*/		*/
	if (!(up->port.flags & UPF_BUGGY_UART) &&		if (!(up->port.flags & UPF_BUGGY_UART) &&
	(serial_inp(up, UART_LSR) == 0xff)) {		(serial_in(up, UART_LSR) == 0xff)) {
	printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",		printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
	serial_index(&up->port));		serial_index(&up->port));
	return -ENODEV;		return -ENODEV;
	@@ -2009,15 +2001,15 @@ static int serial8250_startup(struct uart_port *port)
	if (up->port.type == PORT_16850) {		if (up->port.type == PORT_16850) {
	unsigned char fctr;		unsigned char fctr;

	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);

	fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX\|UART_FCTR_TX);		fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX\|UART_FCTR_TX);
	serial_outp(up, UART_FCTR, fctr \| UART_FCTR_TRGD \| UART_FCTR_RX);		serial_out(up, UART_FCTR, fctr \| UART_FCTR_TRGD \| UART_FCTR_RX);
	serial_outp(up, UART_TRG, UART_TRG_96);		serial_out(up, UART_TRG, UART_TRG_96);
	serial_outp(up, UART_FCTR, fctr \| UART_FCTR_TRGD \| UART_FCTR_TX);		serial_out(up, UART_FCTR, fctr \| UART_FCTR_TRGD \| UART_FCTR_TX);
	serial_outp(up, UART_TRG, UART_TRG_96);		serial_out(up, UART_TRG, UART_TRG_96);

	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	}		}

	if (up->port.irq) {		if (up->port.irq) {
	@@ -2087,7 +2079,7 @@ static int serial8250_startup(struct uart_port *port)
	/*		/*
	* Now, initialize the UART		* Now, initialize the UART
	*/		*/
	serial_outp(up, UART_LCR, UART_LCR_WLEN8);		serial_out(up, UART_LCR, UART_LCR_WLEN8);

	spin_lock_irqsave(&up->port.lock, flags);		spin_lock_irqsave(&up->port.lock, flags);
	if (up->port.flags & UPF_FOURPORT) {		if (up->port.flags & UPF_FOURPORT) {
	@@ -2120,10 +2112,10 @@ static int serial8250_startup(struct uart_port *port)
	* Do a quick test to see if we receive an		* Do a quick test to see if we receive an
	* interrupt when we enable the TX irq.		* interrupt when we enable the TX irq.
	*/		*/
	serial_outp(up, UART_IER, UART_IER_THRI);		serial_out(up, UART_IER, UART_IER_THRI);
	lsr = serial_in(up, UART_LSR);		lsr = serial_in(up, UART_LSR);
	iir = serial_in(up, UART_IIR);		iir = serial_in(up, UART_IIR);
	serial_outp(up, UART_IER, 0);		serial_out(up, UART_IER, 0);

	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {		if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
	if (!(up->bugs & UART_BUG_TXEN)) {		if (!(up->bugs & UART_BUG_TXEN)) {
	@@ -2143,10 +2135,10 @@ dont_test_tx_en:
	* saved flags to avoid getting false values from polling		* saved flags to avoid getting false values from polling
	* routines or the previous session.		* routines or the previous session.
	*/		*/
	serial_inp(up, UART_LSR);		serial_in(up, UART_LSR);
	serial_inp(up, UART_RX);		serial_in(up, UART_RX);
	serial_inp(up, UART_IIR);		serial_in(up, UART_IIR);
	serial_inp(up, UART_MSR);		serial_in(up, UART_MSR);
	up->lsr_saved_flags = 0;		up->lsr_saved_flags = 0;
	up->msr_saved_flags = 0;		up->msr_saved_flags = 0;

	@@ -2156,7 +2148,7 @@ dont_test_tx_en:
	* anyway, so we don't enable them here.		* anyway, so we don't enable them here.
	*/		*/
	up->ier = UART_IER_RLSI \| UART_IER_RDI;		up->ier = UART_IER_RLSI \| UART_IER_RDI;
	serial_outp(up, UART_IER, up->ier);		serial_out(up, UART_IER, up->ier);

	if (up->port.flags & UPF_FOURPORT) {		if (up->port.flags & UPF_FOURPORT) {
	unsigned int icp;		unsigned int icp;
	@@ -2181,7 +2173,7 @@ static void serial8250_shutdown(struct uart_port *port)
	* Disable interrupts from this port		* Disable interrupts from this port
	*/		*/
	up->ier = 0;		up->ier = 0;
	serial_outp(up, UART_IER, 0);		serial_out(up, UART_IER, 0);

	spin_lock_irqsave(&up->port.lock, flags);		spin_lock_irqsave(&up->port.lock, flags);
	if (up->port.flags & UPF_FOURPORT) {		if (up->port.flags & UPF_FOURPORT) {
	@@ -2197,7 +2189,7 @@ static void serial8250_shutdown(struct uart_port *port)
	/*		/*
	* Disable break condition and FIFOs		* Disable break condition and FIFOs
	*/		*/
	serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);		serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
	serial8250_clear_fifos(up);		serial8250_clear_fifos(up);

	#ifdef CONFIG_SERIAL_8250_RSA		#ifdef CONFIG_SERIAL_8250_RSA
	@@ -2374,11 +2366,11 @@ serial8250_do_set_termios(struct uart_port port, struct ktermios termios,
	if (termios->c_cflag & CRTSCTS)		if (termios->c_cflag & CRTSCTS)
	efr \|= UART_EFR_CTS;		efr \|= UART_EFR_CTS;

	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
	if (up->port.flags & UPF_EXAR_EFR)		if (up->port.flags & UPF_EXAR_EFR)
	serial_outp(up, UART_XR_EFR, efr);		serial_out(up, UART_XR_EFR, efr);
	else		else
	serial_outp(up, UART_EFR, efr);		serial_out(up, UART_EFR, efr);
	}		}

	#ifdef CONFIG_ARCH_OMAP		#ifdef CONFIG_ARCH_OMAP
	@@ -2394,9 +2386,9 @@ serial8250_do_set_termios(struct uart_port port, struct ktermios termios,

	if (up->capabilities & UART_NATSEMI) {		if (up->capabilities & UART_NATSEMI) {
	/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */		/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
	serial_outp(up, UART_LCR, 0xe0);		serial_out(up, UART_LCR, 0xe0);
	} else {		} else {
	serial_outp(up, UART_LCR, cval \| UART_LCR_DLAB);/* set DLAB */		serial_out(up, UART_LCR, cval \| UART_LCR_DLAB);/* set DLAB */
	}		}

	serial_dl_write(up, quot);		serial_dl_write(up, quot);
	@@ -2406,16 +2398,16 @@ serial8250_do_set_termios(struct uart_port port, struct ktermios termios,
	* is written without DLAB set, this mode will be disabled.		* is written without DLAB set, this mode will be disabled.
	*/		*/
	if (up->port.type == PORT_16750)		if (up->port.type == PORT_16750)
	serial_outp(up, UART_FCR, fcr);		serial_out(up, UART_FCR, fcr);

	serial_outp(up, UART_LCR, cval); /* reset DLAB */		serial_out(up, UART_LCR, cval); /* reset DLAB */
	up->lcr = cval; /* Save LCR */		up->lcr = cval; /* Save LCR */
	if (up->port.type != PORT_16750) {		if (up->port.type != PORT_16750) {
	if (fcr & UART_FCR_ENABLE_FIFO) {		if (fcr & UART_FCR_ENABLE_FIFO) {
	/* emulated UARTs (Lucent Venus 167x) need two steps */		/* emulated UARTs (Lucent Venus 167x) need two steps */
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);		serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
	}		}
	serial_outp(up, UART_FCR, fcr); /* set fcr */		serial_out(up, UART_FCR, fcr); /* set fcr */
	}		}
	serial8250_set_mctrl(&up->port, up->port.mctrl);		serial8250_set_mctrl(&up->port, up->port.mctrl);
	spin_unlock_irqrestore(&up->port.lock, flags);		spin_unlock_irqrestore(&up->port.lock, flags);
	@@ -2997,11 +2989,11 @@ void serial8250_resume_port(int line)

	if (up->capabilities & UART_NATSEMI) {		if (up->capabilities & UART_NATSEMI) {
	/* Ensure it's still in high speed mode */		/* Ensure it's still in high speed mode */
	serial_outp(up, UART_LCR, 0xE0);		serial_out(up, UART_LCR, 0xE0);

	ns16550a_goto_highspeed(up);		ns16550a_goto_highspeed(up);

	serial_outp(up, UART_LCR, 0);		serial_out(up, UART_LCR, 0);
	up->port.uartclk = 921600*16;		up->port.uartclk = 921600*16;
	}		}
	uart_resume_port(&serial8250_reg, &up->port);		uart_resume_port(&serial8250_reg, &up->port);