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Commit 092945e1 authored by Adam Jackson's avatar Adam Jackson Committed by Daniel Vetter
Browse files

drm/i915/dp: Use auxch precharge value of 5 everywhere 



The default in the Sandybridge docs is 5, as on Ironlake, and I have no
reason to believe 3 would work any better.

Signed-off-by: default avatarAdam Jackson <ajax@redhat.com>
Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 6919132e

drivers/gpu/drm/i915/intel_dp.c

+1 −6
Original line number Original line Diff line number Diff line
@@ -362,7 +362,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, 
	int recv_bytes;

	int recv_bytes;

	uint32_t status;

	uint32_t status;

	uint32_t aux_clock_divider;

	uint32_t aux_clock_divider;

	int try, precharge;

	int try, precharge = 5;





	intel_dp_check_edp(intel_dp);

	intel_dp_check_edp(intel_dp);

	/* The clock divider is based off the hrawclk,

	/* The clock divider is based off the hrawclk,
@@ -382,11 +382,6 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, 
	else

	else

		aux_clock_divider = intel_hrawclk(dev) / 2;

		aux_clock_divider = intel_hrawclk(dev) / 2;





	if (IS_GEN6(dev))

		precharge = 3;

	else

		precharge = 5;



	/* Try to wait for any previous AUX channel activity */

	/* Try to wait for any previous AUX channel activity */

	for (try = 0; try < 3; try++) {

	for (try = 0; try < 3; try++) {

		status = I915_READ(ch_ctl);

		status = I915_READ(ch_ctl);