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Commit 08f7adf1 authored by Dilip Kota's avatar Dilip Kota Committed by Kiran Gunda
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msm_serial_hs:Enable Error/Break Char off 



Follow the hardware sequence of enabling
RX_ERROR_CHAR_OFF and RX_BREAK_ZERO_CHAR_OFF in
MR2 register, for not allowing the Break and
parity/frame Error characters into Rx FIFO.

CRs-Fixed: 538141
Change-Id: I24f73eea456c4cb2a68b1655bcd5426426ca7d97
Signed-off-by: default avatarDilip Kota <c_dkota@codeaurora.org>
Signed-off-by: default avatarKiran Gunda <kgunda@codeaurora.org>
parent 7b2b104a

drivers/tty/serial/msm_serial_hs.c

+12 −0
Original line number Diff line number Diff line
@@ -3182,6 +3182,7 @@ static int msm_hs_probe(struct platform_device *pdev) 
	int core_irqres, bam_irqres, wakeup_irqres;

	struct msm_serial_hs_platform_data *pdata = pdev->dev.platform_data;

	const struct of_device_id *match;

	unsigned long data;



	if (pdev->dev.of_node) {

		dev_dbg(&pdev->dev, "device tree enabled\n");
@@ -3421,6 +3422,17 @@ static int msm_hs_probe(struct platform_device *pdev) 
	 */

	mb();



	/*

	* Set RX_BREAK_ZERO_CHAR_OFF and RX_ERROR_CHAR_OFF

	* so any rx_break and character having parity of framing

	* error don't enter inside UART RX FIFO.

	*/

	data = msm_hs_read(uport, UART_DM_MR2);

	data |= (UARTDM_MR2_RX_BREAK_ZERO_CHAR_OFF |

			UARTDM_MR2_RX_ERROR_CHAR_OFF);

	msm_hs_write(uport, UART_DM_MR2, data);

	mb();



	msm_uport->clk_state = MSM_HS_CLK_PORT_OFF;

	hrtimer_init(&msm_uport->clk_off_timer, CLOCK_MONOTONIC,

		     HRTIMER_MODE_REL);