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Commit 08c003ea authored by Pratik Patel's avatar Pratik Patel
Browse files

coresight: remove cti-ack-atomic support 



Remove cti-ack-atomic dt property usage since CTI clock is now
guaranteed to be enabled as long as a mapping exist on the CTI.

This removes the need to explicitly vote for CTI clock based on
the property during probe and it is neither required to skip the
clock enablement in coresight_cti_ack_trig() since CTI clock
enablement in coresight_cti_ack_trig() is not need and is
removed.

Change-Id: I74335b6f124f4cbaadcc58fca10cf3e54f2f39fb
Signed-off-by: default avatarPratik Patel <pratikp@codeaurora.org>
parent cf06ad13

Documentation/devicetree/bindings/coresight/coresight.txt

+0 −2
Original line number Diff line number Diff line
@@ -135,8 +135,6 @@ Optional properties: 
- qcom,cti-save : boolean, indicating cti context needs to be saved and restored

- qcom,cti-hwclk : boolean, indicating support of hardware clock to access cti

		   registers to be saved and restored

- qcom,cti-ack-atomic : boolean, indicating cti interrupt acknowledgement needs

			to be done in atomic context

- qcom,cti-gpio-trigin : cti trigger input driven by gpio

- qcom,cti-gpio-trigout : cti trigger output sent to gpio

- qcom,pc-save : program counter save implemented

arch/arm/boot/dts/qcom/msm8994-coresight-v1.dtsi

+0 −8
Original line number Diff line number Diff line
@@ -550,7 +550,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};
@@ -568,7 +567,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};
@@ -586,7 +584,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};
@@ -604,7 +601,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};
@@ -622,7 +618,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};
@@ -640,7 +635,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};
@@ -658,7 +652,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};
@@ -676,7 +669,6 @@ 
			 <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";



		qcom,cti-ack-atomic;

		qcom,cti-save;

	};

drivers/coresight/coresight-cti.c

+4 −24
Original line number Diff line number Diff line
@@ -94,7 +94,6 @@ struct cti_drvdata { 
	int				cpu;

	bool				cti_save;

	bool				cti_hwclk;

	bool				cti_ack_atomic;

	bool				l2_off;

	struct cti_state		*state;

	struct cti_pctrl		*gpio_trigin;
@@ -702,12 +701,6 @@ int coresight_cti_ack_trig(struct coresight_cti *cti, int trig) 


	drvdata = to_cti_drvdata(cti);



	if (!drvdata->cti_ack_atomic) {

		ret = clk_prepare_enable(drvdata->clk);

		if (ret)

			return ret;

	}



	spin_lock_irqsave(&drvdata->spinlock, flag);

	ret = cti_cpu_verify_access(drvdata);

	if (ret)
@@ -716,9 +709,6 @@ int coresight_cti_ack_trig(struct coresight_cti *cti, int trig) 
	ret = __cti_ack_trig(drvdata, trig);

err:

	spin_unlock_irqrestore(&drvdata->spinlock, flag);



	if (!drvdata->cti_ack_atomic)

		clk_disable_unprepare(drvdata->clk);

	return ret;

}

EXPORT_SYMBOL(coresight_cti_ack_trig);
@@ -1291,21 +1281,13 @@ static int cti_probe(struct platform_device *pdev) 
			return ret;

	}



	if (pdev->dev.of_node) {

		drvdata->cti_ack_atomic =

			 of_property_read_bool(pdev->dev.of_node,

					       "qcom,cti-ack-atomic");



	if (pdev->dev.of_node)

		drvdata->cti_save = of_property_read_bool(pdev->dev.of_node,

							  "qcom,cti-save");

	}



	if (drvdata->cti_save)

		drvdata->cti_hwclk = of_property_read_bool(pdev->dev.of_node,

							   "qcom,cti-hwclk");



	if ((drvdata->cti_save && !drvdata->cti_hwclk) ||

	    drvdata->cti_ack_atomic) {

	if (drvdata->cti_save && !drvdata->cti_hwclk) {

		ret = clk_prepare_enable(drvdata->clk);

		if (ret)

			return ret;
@@ -1368,8 +1350,7 @@ static int cti_probe(struct platform_device *pdev) 
	dev_info(dev, "CTI initialized\n");

	return 0;

err:

	if ((drvdata->cti_save && !drvdata->cti_hwclk) ||

	    drvdata->cti_ack_atomic)

	if (drvdata->cti_save && !drvdata->cti_hwclk)

		clk_disable_unprepare(drvdata->clk);

	return ret;

}
@@ -1378,8 +1359,7 @@ static int cti_remove(struct platform_device *pdev) 
{

	struct cti_drvdata *drvdata = platform_get_drvdata(pdev);



	if ((drvdata->cti_save && !drvdata->cti_hwclk) ||

	    drvdata->cti_ack_atomic)

	if (drvdata->cti_save && !drvdata->cti_hwclk)

		clk_disable_unprepare(drvdata->clk);

	coresight_unregister(drvdata->csdev);

	return 0;