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Commit 089ad64e authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: gdsc: Add support to enable a root clock 



Due to hardware bug subsystems which has synchronous reset with the
GDSCR the root clock will become active without the software knowledge.
Due to this the source pll needs to be turned on before configuring the
root or a clk_set_rate is issued.

Add a new property qcom,enable-root-clk which will allow sw prepare count
and enable count to be incremented to match the HW state. This will in
turn help in enabling/voting for the pll before the RCGR's new src is
selected. The dummy count will be removed before disabling the GDSCR.

Change-Id: Ife302009b9e672446f7191c4990e61c1f2cd86cd
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent e7e72293

Documentation/devicetree/bindings/regulator/gdsc-regulator.txt

+6 −0
Original line number Diff line number Diff line
@@ -23,6 +23,12 @@ Optional properties: 
 - qcom,support-hw-trigger: Presence denotes a hardware feature to switch

			    on/off this regulator based on internal HW signals

			    to save more power.

 - qcom,enable-root-clk: Presence denotes that the clocks in the "clocks"

			property are requried to be enabled before gdsc is

			turned on and disabled before turning off gdsc. This

			will be used in susbsystems where reset is synchronous

			and root clk is active without sw being aware of its

			state.



Example:

	gdsc_oxili_gx: qcom,gdsc@fd8c4024 {

drivers/clk/qcom/gdsc.c

+15 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ struct gdsc { 
	bool			toggle_periph;

	bool			toggle_logic;

	bool			resets_asserted;

	bool			root_en;

};



static int gdsc_is_enabled(struct regulator_dev *rdev)
@@ -69,6 +70,11 @@ static int gdsc_enable(struct regulator_dev *rdev) 
	uint32_t regval;

	int i, ret;



	if (sc->root_en) {

		for (i = 0; i < sc->clock_count; i++)

			clk_prepare_enable(sc->clocks[i]);

	}



	if (sc->toggle_logic) {

		regval = readl_relaxed(sc->gdscr);

		if (regval & HW_CONTROL_MASK) {
@@ -147,6 +153,11 @@ static int gdsc_disable(struct regulator_dev *rdev) 
		sc->resets_asserted = true;

	}



	if (sc->root_en) {

		for (i = sc->clock_count-1; i >= 0; i--)

			clk_disable_unprepare(sc->clocks[i]);

	}



	return ret;

}
@@ -279,6 +290,10 @@ static int gdsc_probe(struct platform_device *pdev) 
			sizeof(struct clk *) * sc->clock_count, GFP_KERNEL);

	if (!sc->clocks)

		return -ENOMEM;



	sc->root_en = of_property_read_bool(pdev->dev.of_node,

						"qcom,enable-root-clk");



	for (i = 0; i < sc->clock_count; i++) {

		const char *clock_name;

		of_property_read_string_index(pdev->dev.of_node, "clock-names",