Loading drivers/video/msm/mdss/mdss_dsi.c +2 −12 Original line number Diff line number Diff line Loading @@ -316,20 +316,10 @@ static int mdss_dsi_off(struct mdss_panel_data *pdata) /* disable DSI controller */ mdss_dsi_controller_cfg(0, pdata); mdss_dsi_clk_ctrl(ctrl_pdata, 0); ret = mdss_dsi_enable_bus_clocks(ctrl_pdata); if (ret) { pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__, ret); mdss_dsi_panel_power_on(pdata, 0); return ret; } /* disable DSI phy */ mdss_dsi_phy_enable(ctrl_pdata, 0); mdss_dsi_phy_disable(ctrl_pdata); mdss_dsi_disable_bus_clocks(ctrl_pdata); mdss_dsi_clk_ctrl(ctrl_pdata, 0); ret = mdss_dsi_panel_power_on(pdata, 0); if (ret) { Loading drivers/video/msm/mdss/mdss_dsi.h +1 −1 Original line number Diff line number Diff line Loading @@ -415,7 +415,7 @@ void mdss_dsi_clk_deinit(struct mdss_dsi_ctrl_pdata *ctrl_pdata); int mdss_dsi_enable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata); void mdss_dsi_disable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata); void mdss_dsi_panel_reset(struct mdss_panel_data *pdata, int enable); void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on); void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_phy_init(struct mdss_panel_data *pdata); void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base); void mdss_dsi_cmd_test_pattern(struct mdss_panel_data *pdata); Loading drivers/video/msm/mdss/msm_mdss_io_8974.c +18 −46 Original line number Diff line number Diff line Loading @@ -558,43 +558,13 @@ void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base) wmb(); } void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on) void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl) { if (ctrl == NULL) { pr_err("%s: Invalid input data\n", __func__); return; } if (on) { MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x03); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x001); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x000); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x007); wmb(); MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x01); wmb(); usleep(100); /* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07e); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06e); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06c); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x064); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x065); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x075); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x077); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07f); wmb(); } else { if (left_ctrl && (ctrl->panel_data.panel_info.pdest == DISPLAY_1)) Loading @@ -603,16 +573,18 @@ void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on) if (left_ctrl && (ctrl->panel_data.panel_info.pdest == DISPLAY_2)) { MIPI_OUTP(left_ctrl->ctrl_base + 0x0220, 0x006); MIPI_OUTP(left_ctrl->ctrl_base + 0x0470, 0x000); MIPI_OUTP(left_ctrl->ctrl_base + 0x0598, 0x000); } MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x000); MIPI_OUTP(ctrl->ctrl_base + 0x0598, 0x000); /* * Wait for the registers writes to complete in order to * ensure that the phy is completely disabled */ wmb(); } } void mdss_dsi_phy_init(struct mdss_panel_data *pdata) { Loading Loading
drivers/video/msm/mdss/mdss_dsi.c +2 −12 Original line number Diff line number Diff line Loading @@ -316,20 +316,10 @@ static int mdss_dsi_off(struct mdss_panel_data *pdata) /* disable DSI controller */ mdss_dsi_controller_cfg(0, pdata); mdss_dsi_clk_ctrl(ctrl_pdata, 0); ret = mdss_dsi_enable_bus_clocks(ctrl_pdata); if (ret) { pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__, ret); mdss_dsi_panel_power_on(pdata, 0); return ret; } /* disable DSI phy */ mdss_dsi_phy_enable(ctrl_pdata, 0); mdss_dsi_phy_disable(ctrl_pdata); mdss_dsi_disable_bus_clocks(ctrl_pdata); mdss_dsi_clk_ctrl(ctrl_pdata, 0); ret = mdss_dsi_panel_power_on(pdata, 0); if (ret) { Loading
drivers/video/msm/mdss/mdss_dsi.h +1 −1 Original line number Diff line number Diff line Loading @@ -415,7 +415,7 @@ void mdss_dsi_clk_deinit(struct mdss_dsi_ctrl_pdata *ctrl_pdata); int mdss_dsi_enable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata); void mdss_dsi_disable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata); void mdss_dsi_panel_reset(struct mdss_panel_data *pdata, int enable); void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on); void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_phy_init(struct mdss_panel_data *pdata); void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base); void mdss_dsi_cmd_test_pattern(struct mdss_panel_data *pdata); Loading
drivers/video/msm/mdss/msm_mdss_io_8974.c +18 −46 Original line number Diff line number Diff line Loading @@ -558,43 +558,13 @@ void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base) wmb(); } void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on) void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl) { if (ctrl == NULL) { pr_err("%s: Invalid input data\n", __func__); return; } if (on) { MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x03); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x001); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x000); wmb(); usleep(100); MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x007); wmb(); MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x01); wmb(); usleep(100); /* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07e); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06e); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06c); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x064); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x065); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x075); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x077); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07f); wmb(); } else { if (left_ctrl && (ctrl->panel_data.panel_info.pdest == DISPLAY_1)) Loading @@ -603,16 +573,18 @@ void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on) if (left_ctrl && (ctrl->panel_data.panel_info.pdest == DISPLAY_2)) { MIPI_OUTP(left_ctrl->ctrl_base + 0x0220, 0x006); MIPI_OUTP(left_ctrl->ctrl_base + 0x0470, 0x000); MIPI_OUTP(left_ctrl->ctrl_base + 0x0598, 0x000); } MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006); MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x000); MIPI_OUTP(ctrl->ctrl_base + 0x0598, 0x000); /* * Wait for the registers writes to complete in order to * ensure that the phy is completely disabled */ wmb(); } } void mdss_dsi_phy_init(struct mdss_panel_data *pdata) { Loading