Commit 06bd4ad3 authored Nov 25, 2014 by Subhash Jadavani

drivers: phy: qcom-ufs: add delay around device ref_clk control

To ensure stability of UFS link hibern8 enter/exit operations, we need to
meet following hardware requirements and this change will satisfy them.

1. If we are disabling device ref_clk immediately after putting the link in
hibern8, we need to make sure that device ref_clk is active atleast 1us
after entering into hibern8.

2. If we are going to call the hibern8 exit immediately after enabling
device ref_clk, we should make sure that device ref_clk is stable for
at least 1us before issuing hibern8 exit command.

Change-Id: Iaa2aefd8c6752b0912cf3c5ae57ee8233638fbf0
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>

parent ba6ee8cf

drivers/phy/phy-qcom-ufs.c

+16 −0

Original line number	Diff line number	Diff line
		@@ -496,9 +496,25 @@ static void ufs_qcom_phy_dev_ref_clk_ctrl(struct phy *generic_phy, bool enable)
		else
		temp &= ~UFS_REF_CLK_EN;

		/*
		* If we are here to disable this clock immediately after
		* entering into hibern8, we need to make sure that device
		* ref_clk is active atleast 1us after the hibern8 enter.
		*/
		if (!enable)
		udelay(1);

		writel_relaxed(temp, phy->dev_ref_clk_ctrl_mmio);
		/* ensure that ref_clk is enabled/disabled before we return */
		wmb();
		/*
		* If we call hibern8 exit after this, we need to make sure that
		* device ref_clk is stable for atleast 1us before the hibern8
		* exit command.
		*/
		if (enable)
		udelay(1);

		phy->is_dev_ref_clk_enabled = enable;
		}
		}