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Commit 05e10d17 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Enable GTCU & GTBU clocks"

parents 9f441930 cc63c8e1

arch/arm/boot/dts/qcom/msm8939-gpu.dtsi

+5 −3
Original line number Diff line number Diff line
@@ -30,18 +30,20 @@ 


		/* Clocks = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM |

		KGSL_CLK_MEM_IFACE | KGSL_CLK_ALT_MEM_IFACE */

		qcom,clk-map = <0x0000005E>;

		qcom,clk-map = <0x0000035E>;



		clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>,

		         <&clock_gcc clk_gcc_oxili_ahb_clk>,

		         <&clock_gcc clk_gcc_oxili_gmem_clk>,

		         <&clock_gcc clk_gcc_bimc_gfx_clk>,

		         <&clock_gcc clk_gcc_bimc_gpu_clk>,

		         <&clock_gcc clk_gcc_gtcu_ahb_clk>;

		         <&clock_gcc clk_gcc_gtcu_ahb_clk>,

			 <&clock_gcc clk_gcc_gfx_tcu_clk>,

			 <&clock_gcc clk_gcc_gfx_tbu_clk>;



		clock-names = "core_clk", "iface_clk", "mem_clk",

		              "mem_iface_clk", "alt_mem_iface_clk",

		              "gtcu_iface_clk";

		              "gtcu_iface_clk", "gtcu_clk", "gtbu_clk";



		/* Bus Scale Settings */

		qcom,msm-bus,name = "grp3d";

drivers/gpu/msm/kgsl_pwrctrl.c

+8 −0
Original line number Diff line number Diff line
@@ -76,6 +76,14 @@ static struct clk_pair clks[KGSL_MAX_CLKS] = { 
		.name = "rbbmtimer_clk",

		.map = KGSL_CLK_RBBMTIMER,

	},

	{

		.name = "gtcu_clk",

		.map = KGSL_CLK_GFX_GTCU,

	},

	{

		.name = "gtbu_clk",

		.map = KGSL_CLK_GFX_GTBU,

	},

};



static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,

drivers/gpu/msm/kgsl_pwrctrl.h

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 


#define KGSL_PWR_ON	0xFFFF



#define KGSL_MAX_CLKS 7

#define KGSL_MAX_CLKS 9



/* Only two supported levels, min & max */

#define KGSL_CONSTRAINT_PWR_MAXLEVELS 2

include/linux/msm_kgsl.h

+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ 
#define KGSL_CLK_AXI	0x00000020

#define KGSL_CLK_ALT_MEM_IFACE 0x00000040

#define KGSL_CLK_RBBMTIMER	0x00000080

#define KGSL_CLK_GFX_GTCU   0x00000100

#define KGSL_CLK_GFX_GTBU   0x00000200



#define KGSL_MAX_PWRLEVELS 10