msm: pm-8x60: Disable cpu clk during retention (056ad557) · Commits · e / devices / android_kernel_sony_msm8994

The CPU clock source MUXes cannot switch while a CPU is in retention, but callers of acpuclock APIs may not known that the CPU is in retention. Fix issue by disabling the cpu clk before entering retention and re-enable them on exit. This would temporarily switch the CPU to 300Mhz and clk api would buffer any clock requests until the clk is enabledi when the core comes out of retention. CRs-fixed: 535967 Change-Id: I103e41fc8ef78cd412b7860bf525ea9cd99ff283 Signed-off-by:

Mahesh Sivasubramanian <msivasub@codeaurora.org> Signed-off-by:

Anil kumar mamidala <amami@codeaurora.org>

arch/arm/mach-msm/pm-8x60.c

+17 −0

Original line number	Diff line number	Diff line
		@@ -515,8 +515,16 @@ static void msm_pm_swfi(void)
		static void msm_pm_retention(void)
		{
		int ret = 0;
		int saved_rate = 0;
		unsigned int cpu = smp_processor_id();
		struct clk *cpu_clk = per_cpu(cpu_clks, cpu);

		msm_pm_config_hw_before_retention();
		if (use_acpuclk_apis)
		saved_rate = acpuclk_power_collapse();
		else
		clk_disable(cpu_clk);

		ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_POWER_RETENTION, false);
		WARN_ON(ret);

		@@ -526,6 +534,15 @@ static void msm_pm_retention(void)
		else
		msm_arch_idle();

		if (use_acpuclk_apis) {
		if (acpuclk_set_rate(cpu, saved_rate, SETRATE_PC))
		pr_err("%s(): Error setting acpuclk_set_rate\n",
		__func__);
		} else {
		if (clk_enable(cpu_clk))
		pr_err("%s(): Error restore cpu clk\n", __func__);
		}

		msm_pm_config_hw_after_retention();
		}