Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0307e41c authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm: clock-pll: add support for pll_alt_config"

parents 13c7bfb3 efcf11cc

arch/arm/mach-msm/clock-pll.c

+27 −0
Original line number Diff line number Diff line
@@ -51,6 +51,9 @@ 
				((x)->n_reg))

#define PLL_CONFIG_REG(x) ((x)->base ? (*(x)->base + (u32)((x)->config_reg)) : \

				((x)->config_reg))

#define PLL_CFG_CTL_REG(x) ((x)->base ? (*(x)->base + \

			(u32)((x)->config_alt_reg)) : ((x)->config_alt_reg))





static DEFINE_SPINLOCK(pll_reg_lock);
@@ -747,6 +750,21 @@ static void __set_fsm_mode(void __iomem *mode_reg, 
	writel_relaxed(regval, mode_reg);

}



static void __configure_alt_config(struct pll_alt_config config,

		struct pll_config_regs *regs)

{

	u32 regval;



	regval = readl_relaxed(PLL_CFG_CTL_REG(regs));



	if (config.mask) {

		regval &= ~config.mask;

		regval |= config.val;

	}



	writel_relaxed(regval, PLL_CFG_CTL_REG(regs));

}



void __configure_pll(struct pll_config *config,

		struct pll_config_regs *regs, u32 ena_fsm_mode)

{
@@ -785,7 +803,16 @@ void __configure_pll(struct pll_config *config, 
	/* Select VCO setting */

	regval &= ~config->vco_mask;

	regval |= config->vco_val;



	if (config->add_factor_mask) {

		regval &= ~config->add_factor_mask;

		regval |= config->add_factor_val;

	}



	writel_relaxed(regval, PLL_CONFIG_REG(regs));



	if (regs->config_alt_reg)

		__configure_alt_config(config->alt_cfg, regs);

}



void configure_sr_pll(struct pll_config *config,

arch/arm/mach-msm/clock-pll.h

+10 −0
Original line number Diff line number Diff line
@@ -170,6 +170,11 @@ static inline struct pll_clk *to_pll_clk(struct clk *c) 
int sr_pll_clk_enable(struct clk *c);

int sr_hpm_lp_pll_clk_enable(struct clk *c);



struct pll_alt_config {

	u32 val;

	u32 mask;

};



struct pll_config {

	u32 l;

	u32 m;
@@ -186,6 +191,10 @@ struct pll_config { 
	u32 main_output_mask;

	u32 aux_output_val;

	u32 aux_output_mask;

	/* SR2 PLL specific fields */

	u32 add_factor_val;

	u32 add_factor_mask;

	struct pll_alt_config alt_cfg;

};



struct pll_config_regs {
@@ -193,6 +202,7 @@ struct pll_config_regs { 
	void __iomem *m_reg;

	void __iomem *n_reg;

	void __iomem *config_reg;

	void __iomem *config_alt_reg;

	void __iomem *mode_reg;

	void *const __iomem *base;

};