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Commit 02c981c0 authored by Binghua Duan's avatar Binghua Duan Committed by Barry Song
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ARM: CSR: Adding CSR SiRFprimaII board support 



SiRFprimaII is the latest generation application processor from CSR’s
Multifunction SoC product family. Designed around an ARM cortex A9 core,
high-speed memory bus, advanced 3D accelerator and full-HD multi-format
video decoder, SiRFprimaII is able to meet the needs of complicated
applications for modern multifunction devices that require heavy concurrent
applications and fluid user experience. Integrated with GPS baseband,
analog and PMU, this new platform is designed to provide a cost effective
solution for Automotive and Consumer markets.

This patch adds the basic support for this SoC and EVB board based on device
tree. It is following the ZYNQ of Xilinx in some degree.

Signed-off-by: default avatarBinghua Duan <Binghua.Duan@csr.com>
Signed-off-by: default avatarRongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: default avatarZhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: default avatarYuping Luo <Yuping.Luo@csr.com>
Signed-off-by: default avatarBin Shi <Bin.Shi@csr.com>
Signed-off-by: default avatarHuayi Li <Huayi.Li@csr.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
parent f1bb20a8

Documentation/devicetree/bindings/arm/sirf.txt

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prima2 "cb" evalutation board

Required root node properties:

    - compatible = "sirf,prima2-cb", "sirf,prima2";

arch/arm/Kconfig

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@@ -879,6 +879,20 @@ config ARCH_VT8500 
	select HAVE_PWM

	help

	  Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.



config ARCH_PRIMA2

	bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"

	select CPU_V7

	select GENERIC_TIME

	select NO_IOPORT

	select GENERIC_CLOCKEVENTS

	select CLKDEV_LOOKUP

	select GENERIC_IRQ_CHIP

	select USE_OF

	select ZONE_DMA

	help

          Support for CSR SiRFSoC ARM Cortex A9 Platform



endchoice



#

arch/arm/Makefile

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@@ -169,6 +169,7 @@ machine-$(CONFIG_ARCH_OMAP3) := omap2 
machine-$(CONFIG_ARCH_OMAP4)		:= omap2

machine-$(CONFIG_ARCH_ORION5X)		:= orion5x

machine-$(CONFIG_ARCH_PNX4008)		:= pnx4008

machine-$(CONFIG_ARCH_PRIMA2)		:= prima2

machine-$(CONFIG_ARCH_PXA)		:= pxa

machine-$(CONFIG_ARCH_REALVIEW)		:= realview

machine-$(CONFIG_ARCH_RPC)		:= rpc

arch/arm/boot/dts/prima2-cb.dts

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+416 −0
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/dts-v1/;

/ {

	model = "SiRF Prima2 eVB";

	compatible = "sirf,prima2-cb", "sirf,prima2";

	#address-cells = <1>;

	#size-cells = <1>;

	interrupt-parent = <&intc>;



	memory {

		reg = <0x00000000 0x20000000>;

	};



	chosen {

		bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";

		linux,stdout-path = &uart1;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			reg = <0x0>;

			d-cache-line-size = <32>;

			i-cache-line-size = <32>;

			d-cache-size = <32768>;

			i-cache-size = <32768>;

			/* from bootloader */

			timebase-frequency = <0>;

			bus-frequency = <0>;

			clock-frequency = <0>;

		};

	};



	axi {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x40000000 0x40000000 0x80000000>;



		l2-cache-controller@80040000 {

			compatible = "arm,pl310-cache";

			reg = <0x80040000 0x1000>;

			interrupts = <59>;

		};



		intc: interrupt-controller@80020000 {

			#interrupt-cells = <1>;

			interrupt-controller;

			compatible = "sirf,prima2-intc";

			reg = <0x80020000 0x1000>;

		};



		sys-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x88000000 0x88000000 0x40000>;



			clock-controller@88000000 {

				compatible = "sirf,prima2-clkc";

				reg = <0x88000000 0x1000>;

				interrupts = <3>;

			};



			reset-controller@88010000 {

				compatible = "sirf,prima2-rstc";

				reg = <0x88010000 0x1000>;

			};

		};



		mem-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x90000000 0x90000000 0x10000>;



			memory-controller@90000000 {

				compatible = "sirf,prima2-memc";

				reg = <0x90000000 0x10000>;

				interrupts = <27>;

			};

		};



		disp-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x90010000 0x90010000 0x30000>;



			display@90010000 {

				compatible = "sirf,prima2-lcd";

				reg = <0x90010000 0x20000>;

				interrupts = <30>;

			};



			vpp@90020000 {

				compatible = "sirf,prima2-vpp";

				reg = <0x90020000 0x10000>;

				interrupts = <31>;

			};

		};



		graphics-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x98000000 0x98000000 0x8000000>;



			graphics@98000000 {

				compatible = "powervr,sgx531";

				reg = <0x98000000 0x8000000>;

				interrupts = <6>;

			};

		};



		multimedia-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0xa0000000 0xa0000000 0x8000000>;



			multimedia@a0000000 {

				compatible = "sirf,prima2-video-codec";

				reg = <0xa0000000 0x8000000>;

				interrupts = <5>;

			};

		};



		dsp-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0xa8000000 0xa8000000 0x2000000>;



			dspif@a8000000 {

				compatible = "sirf,prima2-dspif";

				reg = <0xa8000000 0x10000>;

				interrupts = <9>;

			};



			gps@a8010000 {

				compatible = "sirf,prima2-gps";

				reg = <0xa8010000 0x10000>;

				interrupts = <7>;

			};



			dsp@a9000000 {

				compatible = "sirf,prima2-dsp";

				reg = <0xa9000000 0x1000000>;

				interrupts = <8>;

			};

		};



		peri-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0xb0000000 0xb0000000 0x180000>;



			timer@b0020000 {

				compatible = "sirf,prima2-tick";

				reg = <0xb0020000 0x1000>;

				interrupts = <0>;

			};



			nand@b0030000 {

				compatible = "sirf,prima2-nand";

				reg = <0xb0030000 0x10000>;

				interrupts = <41>;

			};



			audio@b0040000 {

				compatible = "sirf,prima2-audio";

				reg = <0xb0040000 0x10000>;

				interrupts = <35>;

			};



			uart0: uart@b0050000 {

				cell-index = <0>;

				compatible = "sirf,prima2-uart";

				reg = <0xb0050000 0x10000>;

				interrupts = <17>;

			};



			uart1: uart@b0060000 {

				cell-index = <1>;

				compatible = "sirf,prima2-uart";

				reg = <0xb0060000 0x10000>;

				interrupts = <18>;

			};



			uart2: uart@b0070000 {

				cell-index = <2>;

				compatible = "sirf,prima2-uart";

				reg = <0xb0070000 0x10000>;

				interrupts = <19>;

			};



			usp0: usp@b0080000 {

				cell-index = <0>;

				compatible = "sirf,prima2-usp";

				reg = <0xb0080000 0x10000>;

				interrupts = <20>;

			};



			usp1: usp@b0090000 {

				cell-index = <1>;

				compatible = "sirf,prima2-usp";

				reg = <0xb0090000 0x10000>;

				interrupts = <21>;

			};



			usp2: usp@b00a0000 {

				cell-index = <2>;

				compatible = "sirf,prima2-usp";

				reg = <0xb00a0000 0x10000>;

				interrupts = <22>;

			};



			dmac0: dma-controller@b00b0000 {

				cell-index = <0>;

				compatible = "sirf,prima2-dmac";

				reg = <0xb00b0000 0x10000>;

				interrupts = <12>;

			};



			dmac1: dma-controller@b0160000 {

				cell-index = <1>;

				compatible = "sirf,prima2-dmac";

				reg = <0xb0160000 0x10000>;

				interrupts = <13>;

			};



			vip@b00C0000 {

				compatible = "sirf,prima2-vip";

				reg = <0xb00C0000 0x10000>;

			};



			spi0: spi@b00d0000 {

				cell-index = <0>;

				compatible = "sirf,prima2-spi";

				reg = <0xb00d0000 0x10000>;

				interrupts = <15>;

			};



			spi1: spi@b0170000 {

				cell-index = <1>;

				compatible = "sirf,prima2-spi";

				reg = <0xb0170000 0x10000>;

				interrupts = <16>;

			};



			i2c0: i2c@b00e0000 {

				cell-index = <0>;

				compatible = "sirf,prima2-i2c";

				reg = <0xb00e0000 0x10000>;

				interrupts = <24>;

			};



			i2c1: i2c@b00f0000 {

				cell-index = <1>;

				compatible = "sirf,prima2-i2c";

				reg = <0xb00f0000 0x10000>;

				interrupts = <25>;

			};



			tsc@b0110000 {

				compatible = "sirf,prima2-tsc";

				reg = <0xb0110000 0x10000>;

				interrupts = <33>;

			};



			gpio: gpio-controller@b0120000 {

				#gpio-cells = <2>;

				#interrupt-cells = <2>;

				compatible = "sirf,prima2-gpio";

				reg = <0xb0120000 0x10000>;

				gpio-controller;

				interrupt-controller;

			};



			pwm@b0130000 {

				compatible = "sirf,prima2-pwm";

				reg = <0xb0130000 0x10000>;

			};



			efusesys@b0140000 {

				compatible = "sirf,prima2-efuse";

				reg = <0xb0140000 0x10000>;

			};



			pulsec@b0150000 {

				compatible = "sirf,prima2-pulsec";

				reg = <0xb0150000 0x10000>;

				interrupts = <48>;

			};



			pci-iobg {

				compatible = "sirf,prima2-pciiobg", "simple-bus";

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0x56000000 0x56000000 0x1b00000>;



				sd0: sdhci@56000000 {

					cell-index = <0>;

					compatible = "sirf,prima2-sdhc";

					reg = <0x56000000 0x100000>;

					interrupts = <38>;

				};



				sd1: sdhci@56100000 {

					cell-index = <1>;

					compatible = "sirf,prima2-sdhc";

					reg = <0x56100000 0x100000>;

					interrupts = <38>;

				};



				sd2: sdhci@56200000 {

					cell-index = <2>;

					compatible = "sirf,prima2-sdhc";

					reg = <0x56200000 0x100000>;

					interrupts = <23>;

				};



				sd3: sdhci@56300000 {

					cell-index = <3>;

					compatible = "sirf,prima2-sdhc";

					reg = <0x56300000 0x100000>;

					interrupts = <23>;

				};



				sd4: sdhci@56400000 {

					cell-index = <4>;

					compatible = "sirf,prima2-sdhc";

					reg = <0x56400000 0x100000>;

					interrupts = <39>;

				};



				sd5: sdhci@56500000 {

					cell-index = <5>;

					compatible = "sirf,prima2-sdhc";

					reg = <0x56500000 0x100000>;

					interrupts = <39>;

				};



				pci-copy@57900000 {

					compatible = "sirf,prima2-pcicp";

					reg = <0x57900000 0x100000>;

					interrupts = <40>;

				};



				rom-interface@57a00000 {

					compatible = "sirf,prima2-romif";

					reg = <0x57a00000 0x100000>;

				};

			};

		};



		rtc-iobg {

			compatible = "sirf,prima2-rtciobg", "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			reg = <0x80030000 0x10000>;



			gpsrtc@1000 {

				compatible = "sirf,prima2-gpsrtc";

				reg = <0x1000 0x1000>;

				interrupts = <55 56 57>;

			};



			sysrtc@2000 {

				compatible = "sirf,prima2-sysrtc";

				reg = <0x2000 0x1000>;

				interrupts = <52 53 54>;

			};



			pwrc@3000 {

				compatible = "sirf,prima2-pwrc";

				reg = <0x3000 0x1000>;

				interrupts = <32>;

			};

		};



		uus-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0xb8000000 0xb8000000 0x40000>;



			usb0: usb@b00e0000 {

				compatible = "chipidea,ci13611a-prima2";

				reg = <0xb8000000 0x10000>;

				interrupts = <10>;

			};



			usb1: usb@b00f0000 {

				compatible = "chipidea,ci13611a-prima2";

				reg = <0xb8010000 0x10000>;

				interrupts = <11>;

			};



			sata@b00f0000 {

				compatible = "synopsys,dwc-ahsata";

				reg = <0xb8020000 0x10000>;

				interrupts = <37>;

			};



			security@b00f0000 {

				compatible = "sirf,prima2-security";

				reg = <0xb8030000 0x10000>;

				interrupts = <42>;

			};

		};

	};

};

arch/arm/mach-prima2/Makefile

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obj-y := timer.o

obj-y += irq.o

obj-y += clock.o

obj-y += rstc.o

obj-y += prima2.o