Loading drivers/video/msm/mdss/mdss_mdp_pp.c +64 −25 Original line number Diff line number Diff line Loading @@ -74,6 +74,24 @@ struct mdp_csc_cfg mdp_csc_convert[MDSS_MDP_MAX_CSC] = { }, }; /* * To program a linear LUT we need to make the slope to be 1/16 to enable * conversion from 12bit to 8bit. Also in cases where post blend values might * cross 255, we need to cap them now to 255. The offset of the final segment * would be programmed in such a case and we set the value to 32460 which is * 255 in U8.7. */ static struct mdp_ar_gc_lut_data lin_gc_data[GC_LUT_SEGMENTS] = { { 0, 256, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 32640} }; #define CSC_MV_OFF 0x0 #define CSC_BV_OFF 0x2C #define CSC_LV_OFF 0x14 Loading Loading @@ -1414,22 +1432,29 @@ static int pp_mixer_setup(u32 disp_num, /* GC_LUT is in layer mixer */ if (flags & PP_FLAGS_DIRTY_ARGC) { pgc_config = &mdss_pp_res->argc_disp_cfg[disp_num]; if (pgc_config->flags & MDP_PP_OPS_WRITE) { addr = mixer->base + MDSS_MDP_REG_LM_GC_LUT_BASE; addr = mixer->base + MDSS_MDP_REG_LM_GC_LUT_BASE; /* * ARGC will always be enabled. When user setting is * disabled we program the linear ARGC data to enable * rounding in HW. */ pp_sts->argc_sts |= PP_STS_ENABLE; if (pgc_config->flags & MDP_PP_OPS_WRITE) pp_update_argc_lut(addr, pgc_config); if (pgc_config->flags & MDP_PP_OPS_DISABLE) { pgc_config->r_data = &lin_gc_data[0]; pgc_config->g_data = &lin_gc_data[0]; pgc_config->b_data = &lin_gc_data[0]; pgc_config->num_r_stages = GC_LUT_SEGMENTS; pgc_config->num_g_stages = GC_LUT_SEGMENTS; pgc_config->num_b_stages = GC_LUT_SEGMENTS; pp_update_argc_lut(addr, pgc_config); } if (pgc_config->flags & MDP_PP_OPS_DISABLE) pp_sts->argc_sts &= ~PP_STS_ENABLE; else if (pgc_config->flags & MDP_PP_OPS_ENABLE) pp_sts->argc_sts |= PP_STS_ENABLE; ctl->flush_bits |= lm_bitmask; } /* update LM opmode if LM needs flush */ if ((pp_sts->argc_sts & PP_STS_ENABLE) && (flags & PP_FLAGS_DIRTY_ARGC)) { if (flags & PP_FLAGS_DIRTY_ARGC) { addr = mixer->base + MDSS_MDP_REG_LM_OP_MODE; opmode = readl_relaxed(addr); opmode |= (1 << 0); /* GC_LUT_EN */ Loading Loading @@ -2034,6 +2059,7 @@ int mdss_mdp_pp_init(struct device *dev) struct mdss_data_type *mdata = mdss_mdp_get_mdata(); struct mdss_mdp_pipe *vig; struct pp_hist_col_info *hist; struct mdp_pgc_lut_data *gc_cfg; if (!mdata) return -EPERM; Loading @@ -2046,6 +2072,7 @@ int mdss_mdp_pp_init(struct device *dev) pr_err("%s mdss_pp_res allocation failed!\n", __func__); ret = -ENOMEM; } else { /* Allocate DSPP histogram memory */ hist = devm_kzalloc(dev, sizeof(struct pp_hist_col_info) * mdata->nmixers_intf, Loading @@ -2054,7 +2081,8 @@ int mdss_mdp_pp_init(struct device *dev) pr_err("dspp histogram allocation failed!\n"); ret = -ENOMEM; devm_kfree(dev, mdss_pp_res); } else { goto exit_err; } for (i = 0; i < mdata->nmixers_intf; i++) { mutex_init(&hist[i].hist_mutex); spin_lock_init(&hist[i].hist_lock); Loading @@ -2070,6 +2098,16 @@ int mdss_mdp_pp_init(struct device *dev) hist[3].intr_shift = 22; mdss_pp_res->dspp_hist = hist; /* * Set LM ARGC flags to disable. This would program * default GC which would allow for rounding in HW. */ for (i = 0; i < MDSS_MAX_MIXER_DISP_NUM; i++) { gc_cfg = &mdss_pp_res->argc_disp_cfg[i]; gc_cfg->flags = MDP_PP_OPS_DISABLE; mdss_pp_res->pp_disp_flags[i] |= PP_FLAGS_DIRTY_ARGC; } } } Loading @@ -2085,6 +2123,7 @@ int mdss_mdp_pp_init(struct device *dev) init_completion(&vig[i].pp_res.hist.first_kick); } } exit_err: mutex_unlock(&mdss_pp_mutex); return ret; } Loading Loading
drivers/video/msm/mdss/mdss_mdp_pp.c +64 −25 Original line number Diff line number Diff line Loading @@ -74,6 +74,24 @@ struct mdp_csc_cfg mdp_csc_convert[MDSS_MDP_MAX_CSC] = { }, }; /* * To program a linear LUT we need to make the slope to be 1/16 to enable * conversion from 12bit to 8bit. Also in cases where post blend values might * cross 255, we need to cap them now to 255. The offset of the final segment * would be programmed in such a case and we set the value to 32460 which is * 255 in U8.7. */ static struct mdp_ar_gc_lut_data lin_gc_data[GC_LUT_SEGMENTS] = { { 0, 256, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 0}, {4095, 0, 32640} }; #define CSC_MV_OFF 0x0 #define CSC_BV_OFF 0x2C #define CSC_LV_OFF 0x14 Loading Loading @@ -1414,22 +1432,29 @@ static int pp_mixer_setup(u32 disp_num, /* GC_LUT is in layer mixer */ if (flags & PP_FLAGS_DIRTY_ARGC) { pgc_config = &mdss_pp_res->argc_disp_cfg[disp_num]; if (pgc_config->flags & MDP_PP_OPS_WRITE) { addr = mixer->base + MDSS_MDP_REG_LM_GC_LUT_BASE; addr = mixer->base + MDSS_MDP_REG_LM_GC_LUT_BASE; /* * ARGC will always be enabled. When user setting is * disabled we program the linear ARGC data to enable * rounding in HW. */ pp_sts->argc_sts |= PP_STS_ENABLE; if (pgc_config->flags & MDP_PP_OPS_WRITE) pp_update_argc_lut(addr, pgc_config); if (pgc_config->flags & MDP_PP_OPS_DISABLE) { pgc_config->r_data = &lin_gc_data[0]; pgc_config->g_data = &lin_gc_data[0]; pgc_config->b_data = &lin_gc_data[0]; pgc_config->num_r_stages = GC_LUT_SEGMENTS; pgc_config->num_g_stages = GC_LUT_SEGMENTS; pgc_config->num_b_stages = GC_LUT_SEGMENTS; pp_update_argc_lut(addr, pgc_config); } if (pgc_config->flags & MDP_PP_OPS_DISABLE) pp_sts->argc_sts &= ~PP_STS_ENABLE; else if (pgc_config->flags & MDP_PP_OPS_ENABLE) pp_sts->argc_sts |= PP_STS_ENABLE; ctl->flush_bits |= lm_bitmask; } /* update LM opmode if LM needs flush */ if ((pp_sts->argc_sts & PP_STS_ENABLE) && (flags & PP_FLAGS_DIRTY_ARGC)) { if (flags & PP_FLAGS_DIRTY_ARGC) { addr = mixer->base + MDSS_MDP_REG_LM_OP_MODE; opmode = readl_relaxed(addr); opmode |= (1 << 0); /* GC_LUT_EN */ Loading Loading @@ -2034,6 +2059,7 @@ int mdss_mdp_pp_init(struct device *dev) struct mdss_data_type *mdata = mdss_mdp_get_mdata(); struct mdss_mdp_pipe *vig; struct pp_hist_col_info *hist; struct mdp_pgc_lut_data *gc_cfg; if (!mdata) return -EPERM; Loading @@ -2046,6 +2072,7 @@ int mdss_mdp_pp_init(struct device *dev) pr_err("%s mdss_pp_res allocation failed!\n", __func__); ret = -ENOMEM; } else { /* Allocate DSPP histogram memory */ hist = devm_kzalloc(dev, sizeof(struct pp_hist_col_info) * mdata->nmixers_intf, Loading @@ -2054,7 +2081,8 @@ int mdss_mdp_pp_init(struct device *dev) pr_err("dspp histogram allocation failed!\n"); ret = -ENOMEM; devm_kfree(dev, mdss_pp_res); } else { goto exit_err; } for (i = 0; i < mdata->nmixers_intf; i++) { mutex_init(&hist[i].hist_mutex); spin_lock_init(&hist[i].hist_lock); Loading @@ -2070,6 +2098,16 @@ int mdss_mdp_pp_init(struct device *dev) hist[3].intr_shift = 22; mdss_pp_res->dspp_hist = hist; /* * Set LM ARGC flags to disable. This would program * default GC which would allow for rounding in HW. */ for (i = 0; i < MDSS_MAX_MIXER_DISP_NUM; i++) { gc_cfg = &mdss_pp_res->argc_disp_cfg[i]; gc_cfg->flags = MDP_PP_OPS_DISABLE; mdss_pp_res->pp_disp_flags[i] |= PP_FLAGS_DIRTY_ARGC; } } } Loading @@ -2085,6 +2123,7 @@ int mdss_mdp_pp_init(struct device *dev) init_completion(&vig[i].pp_res.hist.first_kick); } } exit_err: mutex_unlock(&mdss_pp_mutex); return ret; } Loading