Loading arch/arm/boot/dts/apq8084-cdp.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -12,14 +12,14 @@ / { aliases { serial0 = &blsp1_uart1; serial0 = &blsp2_uart1; }; }; &soc { }; &blsp1_uart1 { &blsp2_uart1 { status = "ok"; }; Loading arch/arm/boot/dts/apq8084.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -132,6 +132,13 @@ status = "disabled"; }; blsp2_uart1: serial@f995e000 { compatible = "qcom,msm-lsuart-v14"; reg = <0xf995e000 0x1000>; interrupts = <0 114 0>; status = "disabled"; }; serial@f991f000 { compatible = "qcom,msm-lsuart-v14"; reg = <0xf991f000 0x1000>; Loading arch/arm/mach-msm/board-8084-gpiomux.c +18 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,12 @@ static struct gpiomux_setting gpio_i2c_config = { .pull = GPIOMUX_PULL_NONE, }; static struct gpiomux_setting gpio_uart_config = { .func = GPIOMUX_FUNC_2, .drv = GPIOMUX_DRV_16MA, .pull = GPIOMUX_PULL_NONE, }; static struct msm_gpiomux_config msm_blsp_configs[] __initdata = { { .gpio = 10, /* BLSP1 QUP3 I2C_SDA */ Loading @@ -36,6 +42,18 @@ static struct msm_gpiomux_config msm_blsp_configs[] __initdata = { [GPIOMUX_SUSPENDED] = &gpio_i2c_config, }, }, { .gpio = 51, /* BLSP2 UART1 TX */ .settings = { [GPIOMUX_SUSPENDED] = &gpio_uart_config, }, }, { .gpio = 52, /* BLSP2 UART1 RX */ .settings = { [GPIOMUX_SUSPENDED] = &gpio_uart_config, }, }, }; static struct gpiomux_setting hsic_act_cfg = { Loading arch/arm/mach-msm/clock-8084.c +3 −3 Original line number Diff line number Diff line Loading @@ -5758,7 +5758,7 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("", gcc_blsp1_uart6_apps_clk.c, ""), /* BLSP2 clocks */ CLK_LOOKUP("", gcc_blsp2_ahb_clk.c, ""), CLK_LOOKUP("iface_clk", gcc_blsp2_ahb_clk.c, "f995e000.serial"), CLK_LOOKUP("", gcc_blsp2_qup1_i2c_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_qup1_spi_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_qup2_i2c_apps_clk.c, ""), Loading @@ -5772,7 +5772,7 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("", gcc_blsp2_qup6_i2c_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_qup6_spi_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart1_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart2_apps_clk.c, ""), CLK_LOOKUP("core_clk", gcc_blsp2_uart2_apps_clk.c, "f995e000.serial"), CLK_LOOKUP("", gcc_blsp2_uart3_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart4_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart5_apps_clk.c, ""), Loading Loading
arch/arm/boot/dts/apq8084-cdp.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -12,14 +12,14 @@ / { aliases { serial0 = &blsp1_uart1; serial0 = &blsp2_uart1; }; }; &soc { }; &blsp1_uart1 { &blsp2_uart1 { status = "ok"; }; Loading
arch/arm/boot/dts/apq8084.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -132,6 +132,13 @@ status = "disabled"; }; blsp2_uart1: serial@f995e000 { compatible = "qcom,msm-lsuart-v14"; reg = <0xf995e000 0x1000>; interrupts = <0 114 0>; status = "disabled"; }; serial@f991f000 { compatible = "qcom,msm-lsuart-v14"; reg = <0xf991f000 0x1000>; Loading
arch/arm/mach-msm/board-8084-gpiomux.c +18 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,12 @@ static struct gpiomux_setting gpio_i2c_config = { .pull = GPIOMUX_PULL_NONE, }; static struct gpiomux_setting gpio_uart_config = { .func = GPIOMUX_FUNC_2, .drv = GPIOMUX_DRV_16MA, .pull = GPIOMUX_PULL_NONE, }; static struct msm_gpiomux_config msm_blsp_configs[] __initdata = { { .gpio = 10, /* BLSP1 QUP3 I2C_SDA */ Loading @@ -36,6 +42,18 @@ static struct msm_gpiomux_config msm_blsp_configs[] __initdata = { [GPIOMUX_SUSPENDED] = &gpio_i2c_config, }, }, { .gpio = 51, /* BLSP2 UART1 TX */ .settings = { [GPIOMUX_SUSPENDED] = &gpio_uart_config, }, }, { .gpio = 52, /* BLSP2 UART1 RX */ .settings = { [GPIOMUX_SUSPENDED] = &gpio_uart_config, }, }, }; static struct gpiomux_setting hsic_act_cfg = { Loading
arch/arm/mach-msm/clock-8084.c +3 −3 Original line number Diff line number Diff line Loading @@ -5758,7 +5758,7 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("", gcc_blsp1_uart6_apps_clk.c, ""), /* BLSP2 clocks */ CLK_LOOKUP("", gcc_blsp2_ahb_clk.c, ""), CLK_LOOKUP("iface_clk", gcc_blsp2_ahb_clk.c, "f995e000.serial"), CLK_LOOKUP("", gcc_blsp2_qup1_i2c_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_qup1_spi_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_qup2_i2c_apps_clk.c, ""), Loading @@ -5772,7 +5772,7 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("", gcc_blsp2_qup6_i2c_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_qup6_spi_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart1_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart2_apps_clk.c, ""), CLK_LOOKUP("core_clk", gcc_blsp2_uart2_apps_clk.c, "f995e000.serial"), CLK_LOOKUP("", gcc_blsp2_uart3_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart4_apps_clk.c, ""), CLK_LOOKUP("", gcc_blsp2_uart5_apps_clk.c, ""), Loading