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Commit 01916270 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm: dp helper: extract drm_dp_clock_recovery_ok 



radeon and intel use the exact same definition.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarDave Airlie <airlied@gmail.com>

v2: Kill 2 more helpers in intel_dp.c that I've missed.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 1ffdff13

drivers/gpu/drm/i915/intel_dp.c

+2 −27
Original line number Diff line number Diff line
@@ -1695,31 +1695,6 @@ intel_dp_signal_levels_hsw(uint8_t train_set) 
	}

}



static uint8_t

intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE],

		      int lane)

{

	int s = (lane & 1) * 4;

	uint8_t l = link_status[lane>>1];



	return (l >> s) & 0xf;

}



/* Check for clock recovery is done on all channels */

static bool

intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)

{

	int lane;

	uint8_t lane_status;



	for (lane = 0; lane < lane_count; lane++) {

		lane_status = intel_get_lane_status(link_status, lane);

		if ((lane_status & DP_LANE_CR_DONE) == 0)

			return false;

	}

	return true;

}



static bool

intel_dp_set_link_train(struct intel_dp *intel_dp,

			uint32_t dp_reg_value,
@@ -1885,7 +1860,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) 
			break;

		}



		if (intel_clock_recovery_ok(link_status, intel_dp->lane_count)) {

		if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {

			DRM_DEBUG_KMS("clock recovery OK\n");

			clock_recovery = true;

			break;
@@ -1967,7 +1942,7 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp) 
			break;



		/* Make sure clock is still ok */

		if (!intel_clock_recovery_ok(link_status, intel_dp->lane_count)) {

		if (!drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {

			intel_dp_start_link_train(intel_dp);

			cr_tries++;

			continue;

drivers/gpu/drm/radeon/atombios_dp.c

+1 −24
Original line number Diff line number Diff line
@@ -294,29 +294,6 @@ static u8 dp_link_status(u8 link_status[DP_LINK_STATUS_SIZE], int r) 
	return link_status[r - DP_LANE0_1_STATUS];

}



static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE],

			     int lane)

{

	int i = DP_LANE0_1_STATUS + (lane >> 1);

	int s = (lane & 1) * 4;

	u8 l = dp_link_status(link_status, i);

	return (l >> s) & 0xf;

}



static bool dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],

				 int lane_count)

{

	int lane;

	u8 lane_status;



	for (lane = 0; lane < lane_count; lane++) {

		lane_status = dp_get_lane_status(link_status, lane);

		if ((lane_status & DP_LANE_CR_DONE) == 0)

			return false;

	}

	return true;

}



static u8 dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],

					int lane)
@@ -811,7 +788,7 @@ static int radeon_dp_link_train_cr(struct radeon_dp_link_train_info *dp_info) 
			break;

		}



		if (dp_clock_recovery_ok(dp_info->link_status, dp_info->dp_lane_count)) {

		if (drm_dp_clock_recovery_ok(dp_info->link_status, dp_info->dp_lane_count)) {

			clock_recovery = true;

			break;

		}

include/drm/drm_dp_helper.h

+2 −0
Original line number Diff line number Diff line
@@ -326,5 +326,7 @@ i2c_dp_aux_add_bus(struct i2c_adapter *adapter); 
#define DP_LINK_STATUS_SIZE	   6

bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE],

			  int lane_count);

bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],

			      int lane_count);



#endif /* _DRM_DP_HELPER_H_ */