Merge "ARM: dts: msm: Configure sensors on BLSP1 QUP3 and QUP1 for ferrum" (01494123) · Commits · e / devices / android_kernel_sony_msm8994

arch/arm/boot/dts/qcom/msmferrum-pinctrl.dtsi

+35 −0

Original line number	Diff line number	Diff line
		@@ -217,6 +217,41 @@
		};
		};

		pmx_i2c_3 {
		/* CLK, DATA */
		qcom,pins = <&gp 29>, <&gp 30>;
		qcom,num-grp-pins = <2>;
		qcom,pin-func = <1>;
		label = "pmx_i2c_3";

		i2c_3_active: i2c_3_active {
		drive-strength = <2>; /* 2 MA */
		bias-disable = <0>; /* No PULL */
		};

		i2c_3_sleep: i2c_3_sleep {
		drive-strength = <2>; /* 2 MA */
		bias-disable = <0>; /* No PULL */
		};
		};

		pmx_i2c_1 {
		/* CLK, DATA */
		qcom,pins = <&gp 6>, <&gp 7>;
		qcom,num-grp-pins = <2>;
		qcom,pin-func = <3>;
		label = "pmx_i2c_1";

		i2c_1_active: i2c_1_active {
		drive-strength = <2>; /* 2 MA */
		bias-disable = <0>; /* No PULL */
		};

		i2c_1_sleep: i2c_1_sleep {
		drive-strength = <2>; /* 2 MA */
		bias-disable = <0>; /* No PULL */
		};
		};

		};
		};

arch/arm/boot/dts/qcom/msmferrum.dtsi

+50 −0

Original line number	Diff line number	Diff line
		@@ -36,6 +36,8 @@
		sdhc2 = &sdhc_2; /* SDC2 SD card slot */
		spi0 = &spi_0; /* SPI0 controller device */
		i2c5 = &i2c_5; /* I2c5 cntroller device */
		i2c3 = &i2c_3; /* I2C3 controller */
		i2c1 = &i2c_1; /* I2C1 controller */
		};

		cpus {
		@@ -585,6 +587,54 @@
		qcom,master-id = <86>;
		};

		i2c_3: i2c@78b7000 { /* BLSP1 QUP3 */
		compatible = "qcom,i2c-msm-v2";
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "qup_phys_addr", "bam_phys_addr";
		reg = <0x78b7000 0x1000>,
		<0x7884000 0x23000>;
		interrupt-names = "qup_irq", "bam_irq";
		interrupts = <0 97 0>, <0 238 0>;
		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
		<&clock_gcc clk_gcc_blsp1_qup3_i2c_apps_clk>;
		clock-names = "iface_clk", "core_clk";
		qcom,clk-freq-out = <100000>;
		qcom,clk-freq-in = <19200000>;
		pinctrl-names = "i2c_active", "i2c_sleep";
		pinctrl-0 = <&i2c_3_active>;
		pinctrl-1 = <&i2c_3_sleep>;
		qcom,noise-rjct-scl = <0>;
		qcom,noise-rjct-sda = <0>;
		qcom,bam-pipe-idx-cons = <8>;
		qcom,bam-pipe-idx-prod = <9>;
		qcom,master-id = <86>;
		};

		i2c_1: i2c@78b5000 { /* BLSP1 QUP1 */
		compatible = "qcom,i2c-msm-v2";
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "qup_phys_addr", "bam_phys_addr";
		reg = <0x78b5000 0x1000>,
		<0x7884000 0x23000>;
		interrupt-names = "qup_irq", "bam_irq";
		interrupts = <0 95 0>, <0 238 0>;
		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
		<&clock_gcc clk_gcc_blsp1_qup1_i2c_apps_clk>;
		clock-names = "iface_clk", "core_clk";
		qcom,clk-freq-out = <100000>;
		qcom,clk-freq-in = <19200000>;
		pinctrl-names = "i2c_active", "i2c_sleep";
		pinctrl-0 = <&i2c_1_active>;
		pinctrl-1 = <&i2c_1_sleep>;
		qcom,noise-rjct-scl = <0>;
		qcom,noise-rjct-sda = <0>;
		qcom,bam-pipe-idx-cons = <4>;
		qcom,bam-pipe-idx-prod = <5>;
		qcom,master-id = <86>;
		};



		};