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Commit 00dfb8df authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: properly set panel mode for eDP 



This should make eDP more reliable.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 06c9c233

drivers/gpu/drm/radeon/atombios_dp.c

+11 −0
Original line number Diff line number Diff line
@@ -553,6 +553,7 @@ static void radeon_dp_set_panel_mode(struct drm_encoder *encoder, 
{

	struct drm_device *dev = encoder->dev;

	struct radeon_device *rdev = dev->dev_private;

	struct radeon_connector *radeon_connector = to_radeon_connector(connector);

	int panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;



	if (!ASIC_IS_DCE4(rdev))
@@ -560,10 +561,20 @@ static void radeon_dp_set_panel_mode(struct drm_encoder *encoder, 


	if (radeon_connector_encoder_is_dp_bridge(connector))

		panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE;

	else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {

		u8 tmp = radeon_read_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_CAP);

		if (tmp & 1)

			panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;

	}



	atombios_dig_encoder_setup(encoder,

				   ATOM_ENCODER_CMD_SETUP_PANEL_MODE,

				   panel_mode);



	if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) &&

	    (panel_mode == DP_PANEL_MODE_INTERNAL_DP2_MODE)) {

		radeon_write_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_SET, 1);

	}

}



void radeon_dp_set_link_config(struct drm_connector *connector,

include/drm/drm_dp_helper.h

+3 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ 


#define DP_MAIN_LINK_CHANNEL_CODING         0x006



#define DP_EDP_CONFIGURATION_CAP            0x00d

#define DP_TRAINING_AUX_RD_INTERVAL         0x00e



#define DP_PSR_SUPPORT                      0x070
@@ -159,6 +160,8 @@ 
# define DP_CP_IRQ			    (1 << 2)

# define DP_SINK_SPECIFIC_IRQ		    (1 << 6)



#define DP_EDP_CONFIGURATION_SET            0x10a



#define DP_LANE0_1_STATUS		    0x202

#define DP_LANE2_3_STATUS		    0x203

# define DP_LANE_CR_DONE		    (1 << 0)