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Commit 0022c0fa authored by Lucille Sylvester's avatar Lucille Sylvester
Browse files

msm: kgsl: Clean-up unneeded power code



No platforms with direct ebi1 connections exist, nor
is idling before changing the frequency needed.

Change-Id: I80911c81ef7303e229494ce6ba3df57ee25b24a5
Signed-off-by: default avatarLucille Sylvester <lsylvest@codeaurora.org>
parent cadcc68d
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+1 −33
Original line number Diff line number Diff line
@@ -173,24 +173,12 @@ void kgsl_pwrctrl_pwrlevel_change(struct kgsl_device *device,
	pwr->bus_mod = 0;
	pwrlevel = &pwr->pwrlevels[pwr->active_pwrlevel];

	if (test_bit(KGSL_PWRFLAGS_AXI_ON, &pwr->power_flags)) {
	if (test_bit(KGSL_PWRFLAGS_AXI_ON, &pwr->power_flags))
		kgsl_pwrctrl_buslevel_update(device, true);
		if (pwr->ebi1_clk)
			clk_set_rate(pwr->ebi1_clk, pwrlevel->bus_freq);
	}

	if (test_bit(KGSL_PWRFLAGS_CLK_ON, &pwr->power_flags) ||
		(device->state == KGSL_STATE_NAP)) {

		/*
		 * On some platforms, instability is caused on
		 * changing clock freq when the core is busy.
		 * Idle the gpu core before changing the clock freq.
		 */

		if (pwr->idle_needed == true)
			device->ftbl->idle(device);

		/*
		 * Don't shift by more than one level at a time to
		 * avoid glitches.
@@ -949,22 +937,12 @@ static void kgsl_pwrctrl_axi(struct kgsl_device *device, int state)
		if (test_and_clear_bit(KGSL_PWRFLAGS_AXI_ON,
			&pwr->power_flags)) {
			trace_kgsl_bus(device, state);
			if (pwr->ebi1_clk) {
				clk_set_rate(pwr->ebi1_clk, 0);
				clk_disable_unprepare(pwr->ebi1_clk);
			}
			kgsl_pwrctrl_buslevel_update(device, false);
		}
	} else if (state == KGSL_PWRFLAGS_ON) {
		if (!test_and_set_bit(KGSL_PWRFLAGS_AXI_ON,
			&pwr->power_flags)) {
			trace_kgsl_bus(device, state);
			if (pwr->ebi1_clk) {
				clk_prepare_enable(pwr->ebi1_clk);
				clk_set_rate(pwr->ebi1_clk,
					pwr->pwrlevels[pwr->active_pwrlevel].
					bus_freq);
			}
			kgsl_pwrctrl_buslevel_update(device, true);
		}
	}
@@ -1103,16 +1081,8 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)

	pwr->power_flags = 0;

	pwr->idle_needed = pdata->idle_needed;
	pwr->interval_timeout = pdata->idle_timeout;
	pwr->strtstp_sleepwake = pdata->strtstp_sleepwake;
	pwr->ebi1_clk = clk_get(&pdev->dev, "bus_clk");
	if (IS_ERR(pwr->ebi1_clk))
		pwr->ebi1_clk = NULL;
	else
		clk_set_rate(pwr->ebi1_clk,
					 pwr->pwrlevels[pwr->active_pwrlevel].
						bus_freq);

	/* Set the CPU latency to 501usec to allow low latency PC modes */
	pwr->pm_qos_latency = 501;
@@ -1183,8 +1153,6 @@ void kgsl_pwrctrl_close(struct kgsl_device *device)

	pm_runtime_disable(device->parentdev);

	clk_put(pwr->ebi1_clk);

	if (pwr->pcl)
		msm_bus_scale_unregister_client(pwr->pcl);

+0 −4
Original line number Diff line number Diff line
@@ -43,7 +43,6 @@ struct kgsl_clk_stats {
/**
 * struct kgsl_pwrctrl - Power control settings for a KGSL device
 * @interrupt_num - The interrupt number for the device
 * @ebi1_clk - Pointer to the EBI clock structure
 * @grp_clks - Array of clocks structures that we control
 * @power_flags - Control flags for power
 * @pwrlevels - List of supported power levels
@@ -59,7 +58,6 @@ struct kgsl_clk_stats {
 * @gpu_reg - pointer to the regulator structure for gpu_reg
 * @gpu_cx - pointer to the regulator structure for gpu_cx
 * @pcl - bus scale identifier
 * @idle_needed - true if the device needs a idle before clock change
 * @irq_name - resource name for the IRQ
 * @clk_stats - structure of clock statistics
 * @pm_qos_req_dma - the power management quality of service structure
@@ -72,7 +70,6 @@ struct kgsl_clk_stats {

struct kgsl_pwrctrl {
	int interrupt_num;
	struct clk *ebi1_clk;
	struct clk *grp_clks[KGSL_MAX_CLKS];
	unsigned long power_flags;
	unsigned long ctrl_flags;
@@ -90,7 +87,6 @@ struct kgsl_pwrctrl {
	struct regulator *gpu_reg;
	struct regulator *gpu_cx;
	uint32_t pcl;
	unsigned int idle_needed;
	const char *irq_name;
	struct kgsl_clk_stats clk_stats;
	struct pm_qos_request pm_qos_req_dma;
+0 −1
Original line number Diff line number Diff line
@@ -187,7 +187,6 @@ static int snapshot_os(struct kgsl_device *device,
	header->power_level = pwr->active_pwrlevel;
	header->power_interval_timeout = pwr->interval_timeout;
	header->grpclk = kgsl_get_clkrate(pwr->grp_clks[0]);
	header->busclk = kgsl_get_clkrate(pwr->ebi1_clk);

	/* Save the last active context */
	kgsl_sharedmem_readl(&device->memstore, &header->current_context,
+0 −2
Original line number Diff line number Diff line
@@ -73,7 +73,6 @@ struct kgsl_pwrlevel {
 * @strtstp_sleepwake:  Flag to decide b/w SLEEP and SLUMBER
 * @bus_control:	Flag if independent bus voting is supported
 * @clk_map:		Clocks map per platform
 * @idle_needed:        Flag to specify if idle needed before clock change
 * @bus_scale_table:	Bus table with different b/w votes
 * @iommu_data:		Struct holding iommu context data
 * @iommu_count:	Number of IOMMU units for the GPU
@@ -89,7 +88,6 @@ struct kgsl_device_platform_data {
	bool strtstp_sleepwake;
	bool bus_control;
	unsigned int clk_map;
	unsigned int idle_needed;
	unsigned int step_mul;
	struct msm_bus_scale_pdata *bus_scale_table;
	struct kgsl_device_iommu_data *iommu_data;