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Commit f5adf94e authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915: Introduce an HAS_IPS() macro 



Follow the trend and don't code conditions with platforms but with
features.

Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3765f304

drivers/gpu/drm/i915/i915_debugfs.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1483,7 +1483,7 @@ static int i915_ips_status(struct seq_file *m, void *unused) 
	struct drm_device *dev = node->minor->dev;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;





	if (!IS_ULT(dev)) {

	if (!HAS_IPS(dev)) {

		seq_puts(m, "not supported\n");

		seq_puts(m, "not supported\n");

		return 0;

		return 0;

	}

	}

drivers/gpu/drm/i915/i915_drv.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -1474,6 +1474,8 @@ struct drm_i915_file_private { 
#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)

#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)

#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)

#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)





#define HAS_IPS(dev)		(IS_ULT(dev))



#define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)

#define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)





#define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)

#define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -3250,7 +3250,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) 
/* IPS only exists on ULT machines and is tied to pipe A. */

/* IPS only exists on ULT machines and is tied to pipe A. */

static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)

static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)

{

{

	return IS_ULT(crtc->base.dev) && crtc->pipe == PIPE_A;

	return HAS_IPS(crtc->base.dev) && crtc->pipe == PIPE_A;

}

}





static void hsw_enable_ips(struct intel_crtc *crtc)

static void hsw_enable_ips(struct intel_crtc *crtc)
@@ -4069,7 +4069,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, 
		pipe_config->pipe_bpp = 8*3;

		pipe_config->pipe_bpp = 8*3;

	}

	}





	if (IS_HASWELL(dev))

	if (HAS_IPS(dev))

		hsw_compute_ips_config(crtc, pipe_config);

		hsw_compute_ips_config(crtc, pipe_config);





	/* XXX: PCH clock sharing is done in ->mode_set, so make sure the old

	/* XXX: PCH clock sharing is done in ->mode_set, so make sure the old