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Commit f3044683 authored by Andrew Lunn's avatar Andrew Lunn Committed by David S. Miller
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net: dsa: mv88e6352: Refactor shareable code



The mv88e6352 allows access to the port phys via an internal mdio bus
which is accessed using registers in the GLOBAL 2 range. The mv88e6171
and probably other devices use the same mechanism. Move this code into
the shared mv88e6xxx.c library.

Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Tested-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ea8860eb
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+12 −65
Original line number Original line Diff line number Diff line
@@ -22,59 +22,6 @@
#include <net/dsa.h>
#include <net/dsa.h>
#include "mv88e6xxx.h"
#include "mv88e6xxx.h"


static int mv88e6352_wait(struct dsa_switch *ds, int reg, int offset, u16 mask)
{
	unsigned long timeout = jiffies + HZ / 10;

	while (time_before(jiffies, timeout)) {
		int ret;

		ret = REG_READ(reg, offset);
		if (!(ret & mask))
			return 0;

		usleep_range(1000, 2000);
	}
	return -ETIMEDOUT;
}

static inline int mv88e6352_phy_wait(struct dsa_switch *ds)
{
	return mv88e6352_wait(ds, REG_GLOBAL2, 0x18, 0x8000);
}

static inline int mv88e6352_eeprom_load_wait(struct dsa_switch *ds)
{
	return mv88e6352_wait(ds, REG_GLOBAL2, 0x14, 0x0800);
}

static inline int mv88e6352_eeprom_busy_wait(struct dsa_switch *ds)
{
	return mv88e6352_wait(ds, REG_GLOBAL2, 0x14, 0x8000);
}

static int __mv88e6352_phy_read(struct dsa_switch *ds, int addr, int regnum)
{
	int ret;

	REG_WRITE(REG_GLOBAL2, 0x18, 0x9800 | (addr << 5) | regnum);

	ret = mv88e6352_phy_wait(ds);
	if (ret < 0)
		return ret;

	return REG_READ(REG_GLOBAL2, 0x19);
}

static int __mv88e6352_phy_write(struct dsa_switch *ds, int addr, int regnum,
				 u16 val)
{
	REG_WRITE(REG_GLOBAL2, 0x19, val);
	REG_WRITE(REG_GLOBAL2, 0x18, 0x9400 | (addr << 5) | regnum);

	return mv88e6352_phy_wait(ds);
}

static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
{
{
	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
@@ -346,12 +293,12 @@ static int mv88e6352_phy_page_read(struct dsa_switch *ds,
	int ret;
	int ret;


	mutex_lock(&ps->phy_mutex);
	mutex_lock(&ps->phy_mutex);
	ret = __mv88e6352_phy_write(ds, port, 0x16, page);
	ret = mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
	if (ret < 0)
	if (ret < 0)
		goto error;
		goto error;
	ret = __mv88e6352_phy_read(ds, port, reg);
	ret = mv88e6xxx_phy_read_indirect(ds, port, reg);
error:
error:
	__mv88e6352_phy_write(ds, port, 0x16, 0x0);
	mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
	mutex_unlock(&ps->phy_mutex);
	mutex_unlock(&ps->phy_mutex);
	return ret;
	return ret;
}
}
@@ -363,13 +310,13 @@ static int mv88e6352_phy_page_write(struct dsa_switch *ds,
	int ret;
	int ret;


	mutex_lock(&ps->phy_mutex);
	mutex_lock(&ps->phy_mutex);
	ret = __mv88e6352_phy_write(ds, port, 0x16, page);
	ret = mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
	if (ret < 0)
	if (ret < 0)
		goto error;
		goto error;


	ret = __mv88e6352_phy_write(ds, port, reg, val);
	ret = mv88e6xxx_phy_write_indirect(ds, port, reg, val);
error:
error:
	__mv88e6352_phy_write(ds, port, 0x16, 0x0);
	mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
	mutex_unlock(&ps->phy_mutex);
	mutex_unlock(&ps->phy_mutex);
	return ret;
	return ret;
}
}
@@ -482,7 +429,7 @@ mv88e6352_phy_read(struct dsa_switch *ds, int port, int regnum)
		return addr;
		return addr;


	mutex_lock(&ps->phy_mutex);
	mutex_lock(&ps->phy_mutex);
	ret = __mv88e6352_phy_read(ds, addr, regnum);
	ret = mv88e6xxx_phy_read_indirect(ds, addr, regnum);
	mutex_unlock(&ps->phy_mutex);
	mutex_unlock(&ps->phy_mutex);


	return ret;
	return ret;
@@ -499,7 +446,7 @@ mv88e6352_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
		return addr;
		return addr;


	mutex_lock(&ps->phy_mutex);
	mutex_lock(&ps->phy_mutex);
	ret = __mv88e6352_phy_write(ds, addr, regnum, val);
	ret = mv88e6xxx_phy_write_indirect(ds, addr, regnum, val);
	mutex_unlock(&ps->phy_mutex);
	mutex_unlock(&ps->phy_mutex);


	return ret;
	return ret;
@@ -553,7 +500,7 @@ static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
	if (ret < 0)
	if (ret < 0)
		goto error;
		goto error;


	ret = mv88e6352_eeprom_busy_wait(ds);
	ret = mv88e6xxx_eeprom_busy_wait(ds);
	if (ret < 0)
	if (ret < 0)
		goto error;
		goto error;


@@ -576,7 +523,7 @@ static int mv88e6352_get_eeprom(struct dsa_switch *ds,


	eeprom->magic = 0xc3ec4951;
	eeprom->magic = 0xc3ec4951;


	ret = mv88e6352_eeprom_load_wait(ds);
	ret = mv88e6xxx_eeprom_load_wait(ds);
	if (ret < 0)
	if (ret < 0)
		return ret;
		return ret;


@@ -657,7 +604,7 @@ static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
	if (ret < 0)
	if (ret < 0)
		goto error;
		goto error;


	ret = mv88e6352_eeprom_busy_wait(ds);
	ret = mv88e6xxx_eeprom_busy_wait(ds);
error:
error:
	mutex_unlock(&ps->eeprom_mutex);
	mutex_unlock(&ps->eeprom_mutex);
	return ret;
	return ret;
@@ -681,7 +628,7 @@ static int mv88e6352_set_eeprom(struct dsa_switch *ds,
	len = eeprom->len;
	len = eeprom->len;
	eeprom->len = 0;
	eeprom->len = 0;


	ret = mv88e6352_eeprom_load_wait(ds);
	ret = mv88e6xxx_eeprom_load_wait(ds);
	if (ret < 0)
	if (ret < 0)
		return ret;
		return ret;


+53 −0
Original line number Original line Diff line number Diff line
@@ -596,6 +596,59 @@ error:
}
}
#endif /* CONFIG_NET_DSA_HWMON */
#endif /* CONFIG_NET_DSA_HWMON */


static int mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, u16 mask)
{
	unsigned long timeout = jiffies + HZ / 10;

	while (time_before(jiffies, timeout)) {
		int ret;

		ret = REG_READ(reg, offset);
		if (!(ret & mask))
			return 0;

		usleep_range(1000, 2000);
	}
	return -ETIMEDOUT;
}

int mv88e6xxx_phy_wait(struct dsa_switch *ds)
{
	return mv88e6xxx_wait(ds, REG_GLOBAL2, 0x18, 0x8000);
}

int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds)
{
	return mv88e6xxx_wait(ds, REG_GLOBAL2, 0x14, 0x0800);
}

int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds)
{
	return mv88e6xxx_wait(ds, REG_GLOBAL2, 0x14, 0x8000);
}

int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum)
{
	int ret;

	REG_WRITE(REG_GLOBAL2, 0x18, 0x9800 | (addr << 5) | regnum);

	ret = mv88e6xxx_phy_wait(ds);
	if (ret < 0)
		return ret;

	return REG_READ(REG_GLOBAL2, 0x19);
}

int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
				 u16 val)
{
	REG_WRITE(REG_GLOBAL2, 0x19, val);
	REG_WRITE(REG_GLOBAL2, 0x18, 0x9400 | (addr << 5) | regnum);

	return mv88e6xxx_phy_wait(ds);
}

static int __init mv88e6xxx_init(void)
static int __init mv88e6xxx_init(void)
{
{
#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)
#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)
+6 −0
Original line number Original line Diff line number Diff line
@@ -82,6 +82,12 @@ int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port);
void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
			struct ethtool_regs *regs, void *_p);
			struct ethtool_regs *regs, void *_p);
int  mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp);
int  mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp);
int mv88e6xxx_phy_wait(struct dsa_switch *ds);
int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds);
int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds);
int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum);
int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
				 u16 val);


extern struct dsa_switch_driver mv88e6131_switch_driver;
extern struct dsa_switch_driver mv88e6131_switch_driver;
extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;