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Commit ed5016d7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm 

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7322/1: Print BUG instead of undefined instruction on BUG_ON()
  ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR
  ARM: 7320/1: Fix proc_info table alignment
parents 5b1cbac3 bdf800c4

arch/arm/kernel/traps.c

+4 −1
Original line number Original line Diff line number Diff line
@@ -266,6 +266,7 @@ void die(const char *str, struct pt_regs *regs, int err) 
{

{

	struct thread_info *thread = current_thread_info();

	struct thread_info *thread = current_thread_info();

	int ret;

	int ret;

	enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE;





	oops_enter();

	oops_enter();
@@ -273,7 +274,9 @@ void die(const char *str, struct pt_regs *regs, int err) 
	console_verbose();

	console_verbose();

	bust_spinlocks(1);

	bust_spinlocks(1);

	if (!user_mode(regs))

	if (!user_mode(regs))

		report_bug(regs->ARM_pc, regs);

		bug_type = report_bug(regs->ARM_pc, regs);

	if (bug_type != BUG_TRAP_TYPE_NONE)

		str = "Oops - BUG";

	ret = __die(str, err, thread, regs);

	ret = __die(str, err, thread, regs);





	if (regs && kexec_should_crash(thread->task))

	if (regs && kexec_should_crash(thread->task))

arch/arm/kernel/vmlinux.lds.S

+1 −0
Original line number Original line Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <asm/page.h>

#include <asm/page.h>

	

	

#define PROC_INFO							\

#define PROC_INFO							\

	. = ALIGN(4);							\

	VMLINUX_SYMBOL(__proc_info_begin) = .;				\

	VMLINUX_SYMBOL(__proc_info_begin) = .;				\

	*(.proc.info.init)						\

	*(.proc.info.init)						\

	VMLINUX_SYMBOL(__proc_info_end) = .;

	VMLINUX_SYMBOL(__proc_info_end) = .;

arch/arm/mm/cache-v7.S

+6 −0
Original line number Original line Diff line number Diff line
@@ -54,9 +54,15 @@ loop1: 
	and	r1, r1, #7			@ mask of the bits for current cache only

	and	r1, r1, #7			@ mask of the bits for current cache only

	cmp	r1, #2				@ see what cache we have at this level

	cmp	r1, #2				@ see what cache we have at this level

	blt	skip				@ skip if no cache, or just i-cache

	blt	skip				@ skip if no cache, or just i-cache

#ifdef CONFIG_PREEMPT

	save_and_disable_irqs r9		@ make cssr&csidr read atomic

#endif

	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr

	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr

	isb					@ isb to sych the new cssr&csidr

	isb					@ isb to sych the new cssr&csidr

	mrc	p15, 1, r1, c0, c0, 0		@ read the new csidr

	mrc	p15, 1, r1, c0, c0, 0		@ read the new csidr

#ifdef CONFIG_PREEMPT

	restore_irqs_notrace r9

#endif

	and	r2, r1, #7			@ extract the length of the cache lines

	and	r2, r1, #7			@ extract the length of the cache lines

	add	r2, r2, #4			@ add 4 (line length offset)

	add	r2, r2, #4			@ add 4 (line length offset)

	ldr	r4, =0x3ff

	ldr	r4, =0x3ff