Loading include/asm-mips/mach-cobalt/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -47,6 +47,7 @@ #define cpu_icache_snoops_remote_store 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_mips32r1 0 #define cpu_has_mips32r1 0 #define cpu_has_mips32r2 0 #define cpu_has_mips32r2 0 Loading include/asm-mips/mach-excite/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -29,6 +29,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_64bits 1 Loading include/asm-mips/mach-ip22/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -31,6 +31,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_64bits 1 Loading include/asm-mips/mach-ip27/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -28,6 +28,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 1 #define cpu_icache_snoops_remote_store 1 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_64bits 1 Loading include/asm-mips/mach-ip32/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -39,6 +39,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_has_4k_cache 1 #define cpu_has_4k_cache 1 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_mips32r1 0 #define cpu_has_mips32r1 0 Loading Loading
include/asm-mips/mach-cobalt/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -47,6 +47,7 @@ #define cpu_icache_snoops_remote_store 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_mips32r1 0 #define cpu_has_mips32r1 0 #define cpu_has_mips32r2 0 #define cpu_has_mips32r2 0 Loading
include/asm-mips/mach-excite/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -29,6 +29,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_64bits 1 Loading
include/asm-mips/mach-ip22/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -31,6 +31,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_64bits 1 Loading
include/asm-mips/mach-ip27/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -28,6 +28,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 1 #define cpu_icache_snoops_remote_store 1 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_64bits 1 Loading
include/asm-mips/mach-ip32/cpu-feature-overrides.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -39,6 +39,7 @@ #define cpu_has_dsp 0 #define cpu_has_dsp 0 #define cpu_has_4k_cache 1 #define cpu_has_4k_cache 1 #define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_has_mips32r1 0 #define cpu_has_mips32r1 0 Loading
Ralf Baechle <ralf@linux-mips.org>Ralf Baechle <ralf@linux-mips.org>