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Commit eb5f4ca9 authored by Martin Fuzzey's avatar Martin Fuzzey Committed by Russell King
Browse files

[ARM] 5534/1: kmalloc must return a cache line aligned buffer 



Define ARCH_KMALLOC_MINALIGN in asm/cache.h
At the request of Russell also move ARCH_SLAB_MINALIGN to this file.

Signed-off-by: default avatarMartin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent d9244b5d

arch/arm/include/asm/cache.h

+16 −0
Original line number Diff line number Diff line
@@ -7,4 +7,20 @@ 
#define L1_CACHE_SHIFT		5

#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)



/*

 * Memory returned by kmalloc() may be used for DMA, so we must make

 * sure that all such allocations are cache aligned. Otherwise,

 * unrelated code may cause parts of the buffer to be read into the

 * cache before the transfer is done, causing old data to be seen by

 * the CPU.

 */

#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES



/*

 * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.

 */

#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)

#define ARCH_SLAB_MINALIGN 8

#endif



#endif

arch/arm/include/asm/page.h

+0 −7
Original line number Diff line number Diff line
@@ -202,13 +202,6 @@ typedef struct page *pgtable_t; 
	(((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \

	 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)



/*

 * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.

 */

#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)

#define ARCH_SLAB_MINALIGN 8

#endif



#include <asm-generic/page.h>



#endif