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Commit d99e19c7 authored by John Crispin's avatar John Crispin Committed by Ralf Baechle
Browse files

DT: MIPS: ralink: add RT2880 dts files 



Add a dtsi file for RT2880 SoC and a sample dts file.

Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Acked-by: default avatarGrant Likely <grant.likely@secretlab.ca>
Patchwork: http://patchwork.linux-mips.org/patch/5188/
parent da5b4cfa

arch/mips/ralink/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -34,6 +34,10 @@ choice 
	config DTB_RT_NONE

		bool "None"



	config DTB_RT2880_EVAL

		bool "RT2880 eval kit"

		depends on SOC_RT288X



	config DTB_RT305X_EVAL

		bool "RT305x eval kit"

		depends on SOC_RT305X

arch/mips/ralink/dts/Makefile

+1 −0
Original line number Diff line number Diff line 
obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o

obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o

arch/mips/ralink/dts/rt2880.dtsi

0 → 100644
+58 −0
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/ {

	#address-cells = <1>;

	#size-cells = <1>;

	compatible = "ralink,rt2880-soc";



	cpus {

		cpu@0 {

			compatible = "mips,mips4KEc";

		};

	};



	cpuintc: cpuintc@0 {

		#address-cells = <0>;

		#interrupt-cells = <1>;

		interrupt-controller;

		compatible = "mti,cpu-interrupt-controller";

	};



	palmbus@300000 {

		compatible = "palmbus";

		reg = <0x300000 0x200000>;

                ranges = <0x0 0x300000 0x1FFFFF>;



		#address-cells = <1>;

		#size-cells = <1>;



		sysc@0 {

			compatible = "ralink,rt2880-sysc";

			reg = <0x0 0x100>;

		};



		intc: intc@200 {

			compatible = "ralink,rt2880-intc";

			reg = <0x200 0x100>;



			interrupt-controller;

			#interrupt-cells = <1>;



			interrupt-parent = <&cpuintc>;

			interrupts = <2>;

		};



		memc@300 {

			compatible = "ralink,rt2880-memc";

			reg = <0x300 0x100>;

		};



		uartlite@c00 {

			compatible = "ralink,rt2880-uart", "ns16550a";

			reg = <0xc00 0x100>;



			interrupt-parent = <&intc>;

			interrupts = <8>;



			reg-shift = <2>;

		};

	};

};

arch/mips/ralink/dts/rt2880_eval.dts

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+46 −0
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/dts-v1/;



/include/ "rt2880.dtsi"



/ {

	compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";

	model = "Ralink RT2880 evaluation board";



	memory@0 {

		reg = <0x8000000 0x2000000>;

	};



	chosen {

		bootargs = "console=ttyS0,57600";

	};



	cfi@1f000000 {

		compatible = "cfi-flash";

		reg = <0x1f000000 0x400000>;



		bank-width = <2>;

		device-width = <2>;

		#address-cells = <1>;

		#size-cells = <1>;



		partition@0 {

			label = "uboot";

			reg = <0x0 0x30000>;

			read-only;

		};

		partition@30000 {

			label = "uboot-env";

			reg = <0x30000 0x10000>;

			read-only;

		};

		partition@40000 {

			label = "calibration";

			reg = <0x40000 0x10000>;

			read-only;

		};

		partition@50000 {

			label = "linux";

			reg = <0x50000 0x3b0000>;

		};

	};

};