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Commit d75e2c9a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull late MIPS fixes from Ralf Baechle:
 "This fixes a number of lose ends in the MIPS code and various bug
  fixes.

  Aside of dropping some patch that should not be in this pull request
  everything has sat in -next for quite a while and there are no known
  issues.

  The biggest patch in this patch set moves the allocation of an array
  that is aliased to a function (for runtime generated code) to
  assembler code.  This avoids an issue with certain toolchains when
  building for microMIPS."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (35 commits)
  MIPS: PCI: Move fixups from __init to __devinit.
  MIPS: Fix bug.h MIPS build regression
  MIPS: sync-r4k: remove redundant irq operation
  MIPS: smp: Warn on too early irq enable
  MIPS: call set_cpu_online() on cpu being brought up with irq disabled
  MIPS: call ->smp_finish() a little late
  MIPS: Yosemite: delay irq enable to ->smp_finish()
  MIPS: SMTC: delay irq enable to ->smp_finish()
  MIPS: BMIPS: delay irq enable to ->smp_finish()
  MIPS: Octeon: delay enable irq to ->smp_finish()
  MIPS: Oprofile: Fix build as a module.
  MIPS: BCM63XX: Fix BCM6368 IPSec clock bit
  MIPS: perf: Fix build error caused by unused counters_per_cpu_to_total()
  MIPS: Fix Magic SysRq L kernel crash.
  MIPS: BMIPS: Fix duplicate header inclusion.
  mips: mark const init data with __initconst instead of __initdata
  MIPS: cmpxchg.h: Add missing include
  MIPS: Malta may also be equipped with MIPS64 R2 processors.
  MIPS: Fix typo multipy -> multiply
  MIPS: Cavium: Fix duplicate ARCH_SPARSEMEM_ENABLE in kconfig.
  ...
parents 93517374 85a053fa

arch/mips/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -288,6 +288,7 @@ config MIPS_MALTA 
	select SYS_HAS_CPU_MIPS32_R1

	select SYS_HAS_CPU_MIPS32_R2

	select SYS_HAS_CPU_MIPS64_R1

	select SYS_HAS_CPU_MIPS64_R2

	select SYS_HAS_CPU_NEVADA

	select SYS_HAS_CPU_RM7000

	select SYS_HAS_EARLY_PRINTK
@@ -1423,6 +1424,7 @@ config CPU_SB1 
config CPU_CAVIUM_OCTEON

	bool "Cavium Octeon processor"

	depends on SYS_HAS_CPU_CAVIUM_OCTEON

	select ARCH_SPARSEMEM_ENABLE

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_64BIT_KERNEL

	select SYS_SUPPORTS_SMP

arch/mips/bcm47xx/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ config BCM47XX_BCMA 
	select BCMA

	select BCMA_HOST_SOC

	select BCMA_DRIVER_MIPS

	select BCMA_HOST_PCI if PCI

	select BCMA_DRIVER_PCI_HOSTMODE if PCI

	default y

	help

arch/mips/bcm63xx/dev-pcmcia.c

+2 −2
Original line number Diff line number Diff line
@@ -79,11 +79,11 @@ static int __init config_pcmcia_cs(unsigned int cs, 
	return ret;

}



static const __initdata struct {

static const struct {

	unsigned int	cs;

	unsigned int	base;

	unsigned int	size;

} pcmcia_cs[3] = {

} pcmcia_cs[3] __initconst = {

	{

		.cs	= MPI_CS_PCMCIA_COMMON,

		.base	= BCM_PCMCIA_COMMON_BASE_PA,

arch/mips/cavium-octeon/Kconfig

+0 −4
Original line number Diff line number Diff line
@@ -82,10 +82,6 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY 
	help

	  Lock the kernel's implementation of memcpy() into L2.



config ARCH_SPARSEMEM_ENABLE

	def_bool y

	select SPARSEMEM_STATIC



config IOMMU_HELPER

	bool

arch/mips/cavium-octeon/smp.c

+1 −1
Original line number Diff line number Diff line
@@ -185,7 +185,6 @@ static void __cpuinit octeon_init_secondary(void) 
	octeon_init_cvmcount();



	octeon_irq_setup_secondary();

	raw_local_irq_enable();

}



/**
@@ -233,6 +232,7 @@ static void octeon_smp_finish(void) 


	/* to generate the first CPU timer interrupt */

	write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);

	local_irq_enable();

}



/**