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Commit d5374ef1 authored by Stanislaw Gruszka's avatar Stanislaw Gruszka Committed by John W. Linville
Browse files

rt2800: refactor RFCSR initialization 



rt2800_init_rfcsr() is too big, split RF initialization into per chip
functions. Code will change, but we should setup the same values onto
RF registers and in the same order as before.

Signed-off-by: default avatarStanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 48c6cc04

drivers/net/wireless/rt2x00/rt2800lib.c

+423 −372
Original line number Diff line number Diff line
@@ -3866,50 +3866,44 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, 
	return rfcsr24;

}



static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)

static void rt2800_init_rfcsr_305x_soc(struct rt2x00_dev *rt2x00dev)

{

	struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;

	u8 rfcsr;

	u8 bbp;

	u32 reg;

	u16 eeprom;



	if (!rt2x00_rt(rt2x00dev, RT3070) &&

	    !rt2x00_rt(rt2x00dev, RT3071) &&

	    !rt2x00_rt(rt2x00dev, RT3090) &&

	    !rt2x00_rt(rt2x00dev, RT3290) &&

	    !rt2x00_rt(rt2x00dev, RT3352) &&

	    !rt2x00_rt(rt2x00dev, RT3390) &&

	    !rt2x00_rt(rt2x00dev, RT3572) &&

	    !rt2x00_rt(rt2x00dev, RT5390) &&

	    !rt2x00_rt(rt2x00dev, RT5392) &&

	    !rt2800_is_305x_soc(rt2x00dev))

		return 0;



	/*

	 * Init RF calibration.

	 */

	if (rt2x00_rt(rt2x00dev, RT3290) ||

	    rt2x00_rt(rt2x00dev, RT5390) ||

	    rt2x00_rt(rt2x00dev, RT5392)) {

		rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);

		rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);

		rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);

		msleep(1);

		rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 0);

		rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);

	} else {

		rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);

		rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);

		rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);

		msleep(1);

		rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);

		rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);

	rt2800_rfcsr_write(rt2x00dev, 0, 0x50);

	rt2800_rfcsr_write(rt2x00dev, 1, 0x01);

	rt2800_rfcsr_write(rt2x00dev, 2, 0xf7);

	rt2800_rfcsr_write(rt2x00dev, 3, 0x75);

	rt2800_rfcsr_write(rt2x00dev, 4, 0x40);

	rt2800_rfcsr_write(rt2x00dev, 5, 0x03);

	rt2800_rfcsr_write(rt2x00dev, 6, 0x02);

	rt2800_rfcsr_write(rt2x00dev, 7, 0x50);

	rt2800_rfcsr_write(rt2x00dev, 8, 0x39);

	rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);

	rt2800_rfcsr_write(rt2x00dev, 10, 0x60);

	rt2800_rfcsr_write(rt2x00dev, 11, 0x21);

	rt2800_rfcsr_write(rt2x00dev, 12, 0x75);

	rt2800_rfcsr_write(rt2x00dev, 13, 0x75);

	rt2800_rfcsr_write(rt2x00dev, 14, 0x90);

	rt2800_rfcsr_write(rt2x00dev, 15, 0x58);

	rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);

	rt2800_rfcsr_write(rt2x00dev, 17, 0x92);

	rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);

	rt2800_rfcsr_write(rt2x00dev, 19, 0x02);

	rt2800_rfcsr_write(rt2x00dev, 20, 0xba);

	rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);

	rt2800_rfcsr_write(rt2x00dev, 22, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 23, 0x31);

	rt2800_rfcsr_write(rt2x00dev, 24, 0x08);

	rt2800_rfcsr_write(rt2x00dev, 25, 0x01);

	rt2800_rfcsr_write(rt2x00dev, 26, 0x25);

	rt2800_rfcsr_write(rt2x00dev, 27, 0x23);

	rt2800_rfcsr_write(rt2x00dev, 28, 0x13);

	rt2800_rfcsr_write(rt2x00dev, 29, 0x83);

	rt2800_rfcsr_write(rt2x00dev, 30, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 31, 0x00);

}



	if (rt2x00_rt(rt2x00dev, RT3070) ||

	    rt2x00_rt(rt2x00dev, RT3071) ||

	    rt2x00_rt(rt2x00dev, RT3090)) {

static void rt2800_init_rfcsr_30xx(struct rt2x00_dev *rt2x00dev)

{

	rt2800_rfcsr_write(rt2x00dev, 4, 0x40);

	rt2800_rfcsr_write(rt2x00dev, 5, 0x03);

	rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
@@ -3929,7 +3923,10 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) 
	rt2800_rfcsr_write(rt2x00dev, 24, 0x16);

	rt2800_rfcsr_write(rt2x00dev, 25, 0x01);

	rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);

	} else if (rt2x00_rt(rt2x00dev, RT3290)) {

}



static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev)

{

	rt2800_rfcsr_write(rt2x00dev, 1, 0x0f);

	rt2800_rfcsr_write(rt2x00dev, 2, 0x80);

	rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
@@ -3976,106 +3973,10 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) 
	rt2800_rfcsr_write(rt2x00dev, 59, 0x09);

	rt2800_rfcsr_write(rt2x00dev, 60, 0x45);

	rt2800_rfcsr_write(rt2x00dev, 61, 0xc1);

	} else if (rt2x00_rt(rt2x00dev, RT3390)) {

		rt2800_rfcsr_write(rt2x00dev, 0, 0xa0);

		rt2800_rfcsr_write(rt2x00dev, 1, 0xe1);

		rt2800_rfcsr_write(rt2x00dev, 2, 0xf1);

		rt2800_rfcsr_write(rt2x00dev, 3, 0x62);

		rt2800_rfcsr_write(rt2x00dev, 4, 0x40);

		rt2800_rfcsr_write(rt2x00dev, 5, 0x8b);

		rt2800_rfcsr_write(rt2x00dev, 6, 0x42);

		rt2800_rfcsr_write(rt2x00dev, 7, 0x34);

		rt2800_rfcsr_write(rt2x00dev, 8, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 9, 0xc0);

		rt2800_rfcsr_write(rt2x00dev, 10, 0x61);

		rt2800_rfcsr_write(rt2x00dev, 11, 0x21);

		rt2800_rfcsr_write(rt2x00dev, 12, 0x3b);

		rt2800_rfcsr_write(rt2x00dev, 13, 0xe0);

		rt2800_rfcsr_write(rt2x00dev, 14, 0x90);

		rt2800_rfcsr_write(rt2x00dev, 15, 0x53);

		rt2800_rfcsr_write(rt2x00dev, 16, 0xe0);

		rt2800_rfcsr_write(rt2x00dev, 17, 0x94);

		rt2800_rfcsr_write(rt2x00dev, 18, 0x5c);

		rt2800_rfcsr_write(rt2x00dev, 19, 0x4a);

		rt2800_rfcsr_write(rt2x00dev, 20, 0xb2);

		rt2800_rfcsr_write(rt2x00dev, 21, 0xf6);

		rt2800_rfcsr_write(rt2x00dev, 22, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 23, 0x14);

		rt2800_rfcsr_write(rt2x00dev, 24, 0x08);

		rt2800_rfcsr_write(rt2x00dev, 25, 0x3d);

		rt2800_rfcsr_write(rt2x00dev, 26, 0x85);

		rt2800_rfcsr_write(rt2x00dev, 27, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 28, 0x41);

		rt2800_rfcsr_write(rt2x00dev, 29, 0x8f);

		rt2800_rfcsr_write(rt2x00dev, 30, 0x20);

		rt2800_rfcsr_write(rt2x00dev, 31, 0x0f);

	} else if (rt2x00_rt(rt2x00dev, RT3572)) {

		rt2800_rfcsr_write(rt2x00dev, 0, 0x70);

		rt2800_rfcsr_write(rt2x00dev, 1, 0x81);

		rt2800_rfcsr_write(rt2x00dev, 2, 0xf1);

		rt2800_rfcsr_write(rt2x00dev, 3, 0x02);

		rt2800_rfcsr_write(rt2x00dev, 4, 0x4c);

		rt2800_rfcsr_write(rt2x00dev, 5, 0x05);

		rt2800_rfcsr_write(rt2x00dev, 6, 0x4a);

		rt2800_rfcsr_write(rt2x00dev, 7, 0xd8);

		rt2800_rfcsr_write(rt2x00dev, 9, 0xc3);

		rt2800_rfcsr_write(rt2x00dev, 10, 0xf1);

		rt2800_rfcsr_write(rt2x00dev, 11, 0xb9);

		rt2800_rfcsr_write(rt2x00dev, 12, 0x70);

		rt2800_rfcsr_write(rt2x00dev, 13, 0x65);

		rt2800_rfcsr_write(rt2x00dev, 14, 0xa0);

		rt2800_rfcsr_write(rt2x00dev, 15, 0x53);

		rt2800_rfcsr_write(rt2x00dev, 16, 0x4c);

		rt2800_rfcsr_write(rt2x00dev, 17, 0x23);

		rt2800_rfcsr_write(rt2x00dev, 18, 0xac);

		rt2800_rfcsr_write(rt2x00dev, 19, 0x93);

		rt2800_rfcsr_write(rt2x00dev, 20, 0xb3);

		rt2800_rfcsr_write(rt2x00dev, 21, 0xd0);

		rt2800_rfcsr_write(rt2x00dev, 22, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 23, 0x3c);

		rt2800_rfcsr_write(rt2x00dev, 24, 0x16);

		rt2800_rfcsr_write(rt2x00dev, 25, 0x15);

		rt2800_rfcsr_write(rt2x00dev, 26, 0x85);

		rt2800_rfcsr_write(rt2x00dev, 27, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 28, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 29, 0x9b);

		rt2800_rfcsr_write(rt2x00dev, 30, 0x09);

		rt2800_rfcsr_write(rt2x00dev, 31, 0x10);

	} else if (rt2800_is_305x_soc(rt2x00dev)) {

		rt2800_rfcsr_write(rt2x00dev, 0, 0x50);

		rt2800_rfcsr_write(rt2x00dev, 1, 0x01);

		rt2800_rfcsr_write(rt2x00dev, 2, 0xf7);

		rt2800_rfcsr_write(rt2x00dev, 3, 0x75);

		rt2800_rfcsr_write(rt2x00dev, 4, 0x40);

		rt2800_rfcsr_write(rt2x00dev, 5, 0x03);

		rt2800_rfcsr_write(rt2x00dev, 6, 0x02);

		rt2800_rfcsr_write(rt2x00dev, 7, 0x50);

		rt2800_rfcsr_write(rt2x00dev, 8, 0x39);

		rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);

		rt2800_rfcsr_write(rt2x00dev, 10, 0x60);

		rt2800_rfcsr_write(rt2x00dev, 11, 0x21);

		rt2800_rfcsr_write(rt2x00dev, 12, 0x75);

		rt2800_rfcsr_write(rt2x00dev, 13, 0x75);

		rt2800_rfcsr_write(rt2x00dev, 14, 0x90);

		rt2800_rfcsr_write(rt2x00dev, 15, 0x58);

		rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);

		rt2800_rfcsr_write(rt2x00dev, 17, 0x92);

		rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);

		rt2800_rfcsr_write(rt2x00dev, 19, 0x02);

		rt2800_rfcsr_write(rt2x00dev, 20, 0xba);

		rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);

		rt2800_rfcsr_write(rt2x00dev, 22, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 23, 0x31);

		rt2800_rfcsr_write(rt2x00dev, 24, 0x08);

		rt2800_rfcsr_write(rt2x00dev, 25, 0x01);

		rt2800_rfcsr_write(rt2x00dev, 26, 0x25);

		rt2800_rfcsr_write(rt2x00dev, 27, 0x23);

		rt2800_rfcsr_write(rt2x00dev, 28, 0x13);

		rt2800_rfcsr_write(rt2x00dev, 29, 0x83);

		rt2800_rfcsr_write(rt2x00dev, 30, 0x00);

		rt2800_rfcsr_write(rt2x00dev, 31, 0x00);

		return 0;

	} else if (rt2x00_rt(rt2x00dev, RT3352)) {

}



static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev)

{

	rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);

	rt2800_rfcsr_write(rt2x00dev, 1, 0x23);

	rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
@@ -4139,7 +4040,81 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) 
	rt2800_rfcsr_write(rt2x00dev, 61, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 62, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 63, 0x00);

	} else if (rt2x00_rt(rt2x00dev, RT5390)) {

}



static void rt2800_init_rfcsr_3390(struct rt2x00_dev *rt2x00dev)

{

	rt2800_rfcsr_write(rt2x00dev, 0, 0xa0);

	rt2800_rfcsr_write(rt2x00dev, 1, 0xe1);

	rt2800_rfcsr_write(rt2x00dev, 2, 0xf1);

	rt2800_rfcsr_write(rt2x00dev, 3, 0x62);

	rt2800_rfcsr_write(rt2x00dev, 4, 0x40);

	rt2800_rfcsr_write(rt2x00dev, 5, 0x8b);

	rt2800_rfcsr_write(rt2x00dev, 6, 0x42);

	rt2800_rfcsr_write(rt2x00dev, 7, 0x34);

	rt2800_rfcsr_write(rt2x00dev, 8, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 9, 0xc0);

	rt2800_rfcsr_write(rt2x00dev, 10, 0x61);

	rt2800_rfcsr_write(rt2x00dev, 11, 0x21);

	rt2800_rfcsr_write(rt2x00dev, 12, 0x3b);

	rt2800_rfcsr_write(rt2x00dev, 13, 0xe0);

	rt2800_rfcsr_write(rt2x00dev, 14, 0x90);

	rt2800_rfcsr_write(rt2x00dev, 15, 0x53);

	rt2800_rfcsr_write(rt2x00dev, 16, 0xe0);

	rt2800_rfcsr_write(rt2x00dev, 17, 0x94);

	rt2800_rfcsr_write(rt2x00dev, 18, 0x5c);

	rt2800_rfcsr_write(rt2x00dev, 19, 0x4a);

	rt2800_rfcsr_write(rt2x00dev, 20, 0xb2);

	rt2800_rfcsr_write(rt2x00dev, 21, 0xf6);

	rt2800_rfcsr_write(rt2x00dev, 22, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 23, 0x14);

	rt2800_rfcsr_write(rt2x00dev, 24, 0x08);

	rt2800_rfcsr_write(rt2x00dev, 25, 0x3d);

	rt2800_rfcsr_write(rt2x00dev, 26, 0x85);

	rt2800_rfcsr_write(rt2x00dev, 27, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 28, 0x41);

	rt2800_rfcsr_write(rt2x00dev, 29, 0x8f);

	rt2800_rfcsr_write(rt2x00dev, 30, 0x20);

	rt2800_rfcsr_write(rt2x00dev, 31, 0x0f);

}



static void rt2800_init_rfcsr_3572(struct rt2x00_dev *rt2x00dev)

{

	rt2800_rfcsr_write(rt2x00dev, 0, 0x70);

	rt2800_rfcsr_write(rt2x00dev, 1, 0x81);

	rt2800_rfcsr_write(rt2x00dev, 2, 0xf1);

	rt2800_rfcsr_write(rt2x00dev, 3, 0x02);

	rt2800_rfcsr_write(rt2x00dev, 4, 0x4c);

	rt2800_rfcsr_write(rt2x00dev, 5, 0x05);

	rt2800_rfcsr_write(rt2x00dev, 6, 0x4a);

	rt2800_rfcsr_write(rt2x00dev, 7, 0xd8);

	rt2800_rfcsr_write(rt2x00dev, 9, 0xc3);

	rt2800_rfcsr_write(rt2x00dev, 10, 0xf1);

	rt2800_rfcsr_write(rt2x00dev, 11, 0xb9);

	rt2800_rfcsr_write(rt2x00dev, 12, 0x70);

	rt2800_rfcsr_write(rt2x00dev, 13, 0x65);

	rt2800_rfcsr_write(rt2x00dev, 14, 0xa0);

	rt2800_rfcsr_write(rt2x00dev, 15, 0x53);

	rt2800_rfcsr_write(rt2x00dev, 16, 0x4c);

	rt2800_rfcsr_write(rt2x00dev, 17, 0x23);

	rt2800_rfcsr_write(rt2x00dev, 18, 0xac);

	rt2800_rfcsr_write(rt2x00dev, 19, 0x93);

	rt2800_rfcsr_write(rt2x00dev, 20, 0xb3);

	rt2800_rfcsr_write(rt2x00dev, 21, 0xd0);

	rt2800_rfcsr_write(rt2x00dev, 22, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 23, 0x3c);

	rt2800_rfcsr_write(rt2x00dev, 24, 0x16);

	rt2800_rfcsr_write(rt2x00dev, 25, 0x15);

	rt2800_rfcsr_write(rt2x00dev, 26, 0x85);

	rt2800_rfcsr_write(rt2x00dev, 27, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 28, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 29, 0x9b);

	rt2800_rfcsr_write(rt2x00dev, 30, 0x09);

	rt2800_rfcsr_write(rt2x00dev, 31, 0x10);

}



static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev)

{

	rt2800_rfcsr_write(rt2x00dev, 1, 0x0f);

	rt2800_rfcsr_write(rt2x00dev, 2, 0x80);

	rt2800_rfcsr_write(rt2x00dev, 3, 0x88);
@@ -4220,7 +4195,10 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) 
		rt2800_rfcsr_write(rt2x00dev, 61, 0xdd);

	rt2800_rfcsr_write(rt2x00dev, 62, 0x00);

	rt2800_rfcsr_write(rt2x00dev, 63, 0x00);

	} else if (rt2x00_rt(rt2x00dev, RT5392)) {

}



static void rt2800_init_rfcsr_5392(struct rt2x00_dev *rt2x00dev)

{

	rt2800_rfcsr_write(rt2x00dev, 1, 0x17);

	rt2800_rfcsr_write(rt2x00dev, 2, 0x80);

	rt2800_rfcsr_write(rt2x00dev, 3, 0x88);
@@ -4282,6 +4260,79 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) 
	rt2800_rfcsr_write(rt2x00dev, 63, 0x07);

}



static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)

{

	struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;

	u8 rfcsr;

	u8 bbp;

	u32 reg;

	u16 eeprom;



	if (!rt2x00_rt(rt2x00dev, RT3070) &&

	    !rt2x00_rt(rt2x00dev, RT3071) &&

	    !rt2x00_rt(rt2x00dev, RT3090) &&

	    !rt2x00_rt(rt2x00dev, RT3290) &&

	    !rt2x00_rt(rt2x00dev, RT3352) &&

	    !rt2x00_rt(rt2x00dev, RT3390) &&

	    !rt2x00_rt(rt2x00dev, RT3572) &&

	    !rt2x00_rt(rt2x00dev, RT5390) &&

	    !rt2x00_rt(rt2x00dev, RT5392) &&

	    !rt2800_is_305x_soc(rt2x00dev))

		return 0;



	/*

	 * Init RF calibration.

	 */



	if (rt2x00_rt(rt2x00dev, RT3290) ||

	    rt2x00_rt(rt2x00dev, RT5390) ||

	    rt2x00_rt(rt2x00dev, RT5392)) {

		rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);

		rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);

		rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);

		msleep(1);

		rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 0);

		rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);

	} else {

		rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);

		rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);

		rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);

		msleep(1);

		rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);

		rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);

	}



	if (rt2800_is_305x_soc(rt2x00dev)) {

		rt2800_init_rfcsr_305x_soc(rt2x00dev);

		return 0;

	}



	switch (rt2x00dev->chip.rt) {

	case RT3070:

	case RT3071:

	case RT3090:

		rt2800_init_rfcsr_30xx(rt2x00dev);

		break;

	case RT3290:

		rt2800_init_rfcsr_3290(rt2x00dev);

		break;

	case RT3352:

		rt2800_init_rfcsr_3352(rt2x00dev);

		break;

	case RT3390:

		rt2800_init_rfcsr_3390(rt2x00dev);

		break;

	case RT3572:

		rt2800_init_rfcsr_3572(rt2x00dev);

		break;

	case RT5390:

		rt2800_init_rfcsr_5390(rt2x00dev);

		break;

	case RT5392:

		rt2800_init_rfcsr_5392(rt2x00dev);

		break;

	}



	if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {

		rt2800_register_read(rt2x00dev, LDO_CFG0, &reg);

		rt2x00_set_field32(&reg, LDO_CFG0_BGSEL, 1);