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Commit c9310920 authored by Piotr Ziecik's avatar Piotr Ziecik Committed by Grant Likely
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powerpc/5200: Enable CPU_FTR_NEED_COHERENT for MPC52xx 



BestComm, a DMA engine in MPC52xx SoC, requires snooping when
CPU caches are enabled to work properly.

Adding CPU_FTR_NEED_COHERENT fixes NFS problems on MPC52xx machines
introduced by 'powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup
code' (sha1: 4c456a67).

Signed-off-by: default avatarPiotr Ziecik <kosmo@semihalf.com>
Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent 5bee17f1

arch/powerpc/include/asm/cputable.h

+3 −1
Original line number Original line Diff line number Diff line
@@ -241,9 +241,11 @@ extern const char *powerpc_base_platform; 
/* We need to mark all pages as being coherent if we're SMP or we have a

/* We need to mark all pages as being coherent if we're SMP or we have a

 * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II

 * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II

 * require it for PCI "streaming/prefetch" to work properly.

 * require it for PCI "streaming/prefetch" to work properly.

 * This is also required by 52xx family.

 */

 */

#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \

#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \

	|| defined(CONFIG_PPC_83xx) || defined(CONFIG_8260)

	|| defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) \

	|| defined(CONFIG_PPC_MPC52xx)

#define CPU_FTR_COMMON                  CPU_FTR_NEED_COHERENT

#define CPU_FTR_COMMON                  CPU_FTR_NEED_COHERENT

#else

#else

#define CPU_FTR_COMMON                  0

#define CPU_FTR_COMMON                  0