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Commit c87b6eba authored by Atsushi Nemoto's avatar Atsushi Nemoto Committed by Ralf Baechle
Browse files

[MIPS] mips hpt cleanup: get rid of mips_hpt_init 



Currently nobody outside time.c require mips_hpt_init().  Remove it
and call c0_hpt_timer_init() directly if R4k counter was used for
timer interrupt.

Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 0d02f073

arch/mips/kernel/time.c

+8 −14
Original line number Diff line number Diff line
@@ -88,12 +88,6 @@ static unsigned int null_hpt_read(void) 
	return 0;

}



static void __init null_hpt_init(void)

{

	/* nothing */

}





/*

 * Timer ack for an R4k-compatible timer of a known frequency.

 */
@@ -133,7 +127,6 @@ static void __init c0_hpt_timer_init(void) 
int (*mips_timer_state)(void);

void (*mips_timer_ack)(void);

unsigned int (*mips_hpt_read)(void);

void (*mips_hpt_init)(void) __initdata = null_hpt_init;

unsigned int mips_hpt_mask = 0xffffffff;



/* last time when xtime and rtc are sync'ed up */
@@ -383,16 +376,20 @@ void __init time_init(void) 


			if (!mips_timer_state) {

				/* No external timer interrupt -- use R4k.  */

				mips_hpt_init = c0_hpt_timer_init;

				mips_timer_ack = c0_timer_ack;

				/* Calculate cache parameters.  */

				cycles_per_jiffy =

					(mips_hpt_frequency + HZ / 2) / HZ;

				/*

				 * This sets up the high precision

				 * timer for the first interrupt.

				 */

				c0_hpt_timer_init();

			}

		}

		if (!mips_hpt_frequency)

			mips_hpt_frequency = calibrate_hpt();



		/* Calculate cache parameters.  */

		cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;



		/* Report the high precision timer rate for a reference.  */

		printk("Using %u.%03u MHz high precision timer.\n",

		       ((mips_hpt_frequency + 500) / 1000) / 1000,
@@ -403,9 +400,6 @@ void __init time_init(void) 
		/* No timer interrupt ack (e.g. i8254).  */

		mips_timer_ack = null_timer_ack;



	/* This sets up the high precision timer for the first interrupt.  */

	mips_hpt_init();



	/*

	 * Call board specific timer interrupt setup.

	 *

arch/mips/pmc-sierra/yosemite/smp.c

+0 −2
Original line number Diff line number Diff line
@@ -99,8 +99,6 @@ void prom_cpus_done(void) 
 */

void prom_init_secondary(void)

{

	mips_hpt_init();



	set_c0_status(ST0_CO | ST0_IE | ST0_IM);

}

include/asm-mips/time.h

+0 −1
Original line number Diff line number Diff line
@@ -48,7 +48,6 @@ extern void (*mips_timer_ack)(void); 
 * If mips_hpt_read is NULL, an R4k-compatible timer setup is attempted.

 */

extern unsigned int (*mips_hpt_read)(void);

extern void (*mips_hpt_init)(void);

extern unsigned int mips_hpt_mask;



/*